diff options
author | Shuo Liu <shuo.liu@intel.com> | 2024-04-10 01:42:06 +0800 |
---|---|---|
committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-04-10 10:52:34 +0000 |
commit | 2f9a579048a406fa9637d4116be9c96a8a936bec (patch) | |
tree | 3088c5896ea88ffca69d7a6cbddb4420388b1e32 /src/mainboard/bytedance/bd_egs | |
parent | e2dd36c6bcdd940cfacdfa5773b367164bc96429 (diff) |
soc/intel/xeon_sp: Remove MAINBOARD_USES_FSP2_0
MAINBOARD_USES_FSP2_0 selects PLATFORM_USES_FSP2_0 and
POSTCAR_STAGE which are used by all Xeon-SP platforms.
After the removal of MAINBOARD_USES_FSP2_0, PLATFORM_USES_FSP2_0
is implicitly selected by SoC Kconfigs in PLATFORM_USES_FSP2_X,
POSTCAR_STAGE is selected by XEON_SP_COMMON_BASE.
TEST=Build and boot on intel/archercity CRB
Change-Id: I45332d49dd21f9749fce458877777a4b783a1b11
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81783
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/bytedance/bd_egs')
-rw-r--r-- | src/mainboard/bytedance/bd_egs/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/bytedance/bd_egs/Kconfig b/src/mainboard/bytedance/bd_egs/Kconfig index 4293181d29..433d962c45 100644 --- a/src/mainboard/bytedance/bd_egs/Kconfig +++ b/src/mainboard/bytedance/bd_egs/Kconfig @@ -5,7 +5,6 @@ if BOARD_BYTEDANCE_BD_EGS config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_65536 - select MAINBOARD_USES_FSP2_0 select SOC_INTEL_SAPPHIRERAPIDS_SP select SUPERIO_ASPEED_AST2400 select HAVE_ACPI_TABLES |