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authorElyes HAOUAS <ehaouas@noos.fr>2016-09-16 20:49:38 +0200
committerPatrick Georgi <pgeorgi@google.com>2016-09-20 19:06:28 +0200
commit6350a2e43f3657567f50160aa28d5d4305803be0 (patch)
tree66473657856456754ab78a636c393c1a744932be /src/mainboard/broadcom/blast/romstage.c
parented5f159ed59c52a4731d07ef19bff8ef8de9ae14 (diff)
src/mainboard/a-trend - emulation: Add space around operators
Change-Id: Ib00a9b2feb723d46642d86b2706728bbca7dd68d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16616 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/broadcom/blast/romstage.c')
-rw-r--r--src/mainboard/broadcom/blast/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c
index d7ba383f88..e687c2e054 100644
--- a/src/mainboard/broadcom/blast/romstage.c
+++ b/src/mainboard/broadcom/blast/romstage.c
@@ -46,8 +46,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/model_fxx/init_cpus.c"
#include "northbridge/amd/amdk8/early_ht.c"
-#define RC0 (6<<8)
-#define RC1 (7<<8)
+#define RC0 (6 << 8)
+#define RC1 (7 << 8)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{