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| author | Sean Rhodes <sean@starlabs.systems> | 2023-05-02 21:02:43 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-05-22 12:42:54 +0000 |
| commit | bfe2cd402d30e7eb7b82f3f4c7d096dcffe2c5b1 (patch) | |
| tree | f70dfda0a63cc51e5a189de2ca7dc5562fda350c /src/mainboard/bostentech/gbyt4 | |
| parent | 9ab3a1fe4a1dace4dad7f1aebcfd2c623f9fbf0a (diff) | |
soc/intel/common: Add an error for missing ramtop CMOS entry
Show an error if an option table is used, and the ramtop entry is not
defined on a platform that uses it.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ie48f0766b29be8e1fb0c1f71c4b2ce6ed20e6207
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74920
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/mainboard/bostentech/gbyt4')
0 files changed, 0 insertions, 0 deletions