mb/bostentech: Add GBYT4 port

- Single channel DDR3L: requires mrc.bin (extracted from ChromeBook
	firmware)
	- Tested, working with: 2GB SK Hynix stick, 4GB Samsung stick
- VGA: Video works with VGA rom extracted from UEFI
	- SeaBIOS (runs the option rom) tested, works in text mode
	- GRUB2 (coreboot runs the option rom) tested, works in VESA mode,
		no video in text mode
- USB: Both USB2.0 ports work using the EHCI controller
	- Works in both SeaBIOS, GRUB2 and Linux
- Serial: driven by an IT8728F SuperIO
	- Works as a console in coreboot, SeaBIOS and GRUB2
	- Works with interrupts in Linux after a cold boot, after a warm
		reboot IRQs get lost
- SATA: 2 ports on board (one is mSATA)
	- SATA init works with both refcode.elf and native refcode
		(patch CB:43133)
	- Booting from SATA works with GRUB2, SATA works in Linux
	- Patch CB:44088 fixes SATA in SeaBIOS
- 4 PCIe Intel ethernet controllers
	- Only tested in Linux, all 4 work with the igb driver
- Power button, reset button and both indicator LEDs work
- Optional fan header is not tested as the appliance is passively
	cooled
- TXE (ME): optional, does not shut down after 30 minutes without the
	TXE blob
	- Works with TXE blob left as is, shows up on PCI
	- Works with the entire TXE section wiped, no device on PCI,
		intelmetool can't find anything

Used rambi as an example, but almost everything is modified as the two
	boards are very different.

Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
Change-Id: I99ed0c94c3255578151f940ad9b274e6f0816bfe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43087
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

3 files changed, 10 insertions, 0 deletions

diff --git a/src/mainboard/bostentech/gbyt4/acpi/ec.asl b/src/mainboard/bostentech/gbyt4/acpi/ec.asl
new file mode 100644
index 0000000000..e69de29bb2
--- /dev/null
+++ b/src/mainboard/bostentech/gbyt4/acpi/ec.asl
diff --git a/src/mainboard/bostentech/gbyt4/acpi/mainboard.asl b/src/mainboard/bostentech/gbyt4/acpi/mainboard.asl
new file mode 100644
index 0000000000..d679d2e2bb
--- /dev/null
+++ b/src/mainboard/bostentech/gbyt4/acpi/mainboard.asl
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * NOTE: this has to be here even when the board has no LPE audio, otherwise
+ * it breaks the SOC specific ACPI code
+ */
+Scope (\_SB.PCI0.LPEA)
+{
+	Name (GBUF, ResourceTemplate () {})
+}
diff --git a/src/mainboard/bostentech/gbyt4/acpi/superio.asl b/src/mainboard/bostentech/gbyt4/acpi/superio.asl
new file mode 100644
index 0000000000..e69de29bb2
--- /dev/null
+++ b/src/mainboard/bostentech/gbyt4/acpi/superio.asl