diff options
author | Richard Smith <smithbone@gmail.com> | 2006-07-24 04:25:47 +0000 |
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committer | Richard Smith <smithbone@gmail.com> | 2006-07-24 04:25:47 +0000 |
commit | cb8eab482ff09ec256456312ef2d6e7710123551 (patch) | |
tree | 7bc1297911194e564b967efba4a03c4dde5f7a13 /src/mainboard/bitworks/ims/failover.c | |
parent | 4788effb045ae1f71d89c78a0b16a93d5ba79e89 (diff) |
add framework for i440bx chipset
add support for NSC pc87351 SuperIO
add Bitworks/IMS manboard config
This is a very basic framework for the i440bx chipset and the
Bitworks IMS board that uses it. Most things are
structure only.
Known issues:
- SMbus reads to the RAM SPD come back
all zero.
- dump_spd_registers() is commented out since it breaks with
the default setting of generic_dump_spd.c where it wants
2 memory controllers.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/bitworks/ims/failover.c')
-rw-r--r-- | src/mainboard/bitworks/ims/failover.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/src/mainboard/bitworks/ims/failover.c b/src/mainboard/bitworks/ims/failover.c new file mode 100644 index 0000000000..bdcb9eaed2 --- /dev/null +++ b/src/mainboard/bitworks/ims/failover.c @@ -0,0 +1,32 @@ +#define ASSEMBLY 1 +#include <stdint.h> +#include <device/pci_def.h> +#include <device/pci_ids.h> +#include <arch/io.h> +#include "arch/romcc_io.h" +#include "pc80/mc146818rtc_early.c" + +static unsigned long main(unsigned long bist) +{ + /* This is the primary cpu how should I boot? */ + if (do_normal_boot()) { + goto normal_image; + } + else { + goto fallback_image; + } + normal_image: + asm volatile ("jmp __normal_image" + : /* outputs */ + : "a" (bist) /* inputs */ + : /* clobbers */ + ); + cpu_reset: + asm volatile ("jmp __cpu_reset" + : /* outputs */ + : "a"(bist) /* inputs */ + : /* clobbers */ + ); + fallback_image: + return bist; +} |