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authorMate Kukri <kukri.mate@gmail.com>2020-07-07 11:10:30 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-21 18:25:51 +0000
commit9c4f97ac287294514f5fe5fdba75cda1d9952cdf (patch)
tree7ab87f05736d1859b67d1195d6550e73e1edb966 /src/mainboard/biostar/th61-itx/early_init.c
parent16597243753e7fafa42d24389040d885b364c29a (diff)
mb/biostar: Add TH61-ITX port
- CPU: only tested with a Xeon E3-1220 (Sandy Bridge) - RAM: native raminit tested (4G+4G, 8G+8G) - USB: both chipset and ASMedia USB3 work, tested in SeaBIOS and Linux (5.4) - LAN: tested in Linux - SATA: all 4 ports work, tested in SeaBIOS and Linux - iGPU: I can't test it as I only have a Xeon for this socket - PEG: tested with an nVidia GT210, initialized by SeaBIOS - PS2 keyboard and mouse combo port: no devices to test with - Front panel header: tested, works - Audio: tested, works - Diagnostic LEDs: TBD Change-Id: I9fd3c0b148b694fcb8e728cc17f0bd45eb5af9f2 Signed-off-by: Mate Kukri <kukri.mate@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43165 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/biostar/th61-itx/early_init.c')
-rw-r--r--src/mainboard/biostar/th61-itx/early_init.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/src/mainboard/biostar/th61-itx/early_init.c b/src/mainboard/biostar/th61-itx/early_init.c
new file mode 100644
index 0000000000..b1a99e0ee8
--- /dev/null
+++ b/src/mainboard/biostar/th61-itx/early_init.c
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bootblock_common.h>
+#include <northbridge/intel/sandybridge/raminit_native.h>
+#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+
+const struct southbridge_usb_port mainboard_usb_ports[] = {
+ { 1, 0, 0 },
+ { 1, 0, 0 },
+ { 1, 0, 1 },
+ { 1, 0, 1 },
+ { 1, 0, 2 },
+ { 1, 0, 2 },
+ { 1, 0, 3 },
+ { 1, 0, 3 },
+ { 1, 0, 4 },
+ { 1, 0, 4 },
+ { 1, 0, 6 },
+ { 1, 0, 5 },
+ { 1, 0, 5 },
+ { 1, 0, 6 },
+};
+
+void mainboard_get_spd(spd_raw_data *spd, bool id_only)
+{
+ read_spd(&spd[0], 0x50, id_only);
+ read_spd(&spd[2], 0x52, id_only);
+}