diff options
| author | Mate Kukri <kukri.mate@gmail.com> | 2020-07-07 11:10:30 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-21 18:25:51 +0000 |
| commit | 9c4f97ac287294514f5fe5fdba75cda1d9952cdf (patch) | |
| tree | 7ab87f05736d1859b67d1195d6550e73e1edb966 /src/mainboard/biostar/th61-itx/cmos.layout | |
| parent | 16597243753e7fafa42d24389040d885b364c29a (diff) | |
mb/biostar: Add TH61-ITX port
- CPU: only tested with a Xeon E3-1220 (Sandy Bridge)
- RAM: native raminit tested (4G+4G, 8G+8G)
- USB: both chipset and ASMedia USB3 work, tested in SeaBIOS and Linux (5.4)
- LAN: tested in Linux
- SATA: all 4 ports work, tested in SeaBIOS and Linux
- iGPU: I can't test it as I only have a Xeon for this socket
- PEG: tested with an nVidia GT210, initialized by SeaBIOS
- PS2 keyboard and mouse combo port: no devices to test with
- Front panel header: tested, works
- Audio: tested, works
- Diagnostic LEDs: TBD
Change-Id: I9fd3c0b148b694fcb8e728cc17f0bd45eb5af9f2
Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43165
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/biostar/th61-itx/cmos.layout')
| -rw-r--r-- | src/mainboard/biostar/th61-itx/cmos.layout | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/src/mainboard/biostar/th61-itx/cmos.layout b/src/mainboard/biostar/th61-itx/cmos.layout new file mode 100644 index 0000000000..556b34e29d --- /dev/null +++ b/src/mainboard/biostar/th61-itx/cmos.layout @@ -0,0 +1,66 @@ +## SPDX-License-Identifier: GPL-2.0-only + +# ----------------------------------------------------------------- +entries + +# ----------------------------------------------------------------- + +0 120 r 0 reserved_memory + +# ----------------------------------------------------------------- + +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 4 boot_option +388 4 h 0 reboot_counter + +# ----------------------------------------------------------------- + +# coreboot config options: console +395 4 e 6 debug_level + +# coreboot config options: southbridge +408 1 e 1 nmi +409 2 e 7 power_on_after_fail +421 1 e 9 sata_mode + +# coreboot config options: northbridge +432 3 e 11 gfx_uma_size + +# coreboot config options: check sums +984 16 h 0 check_sum + +# ----------------------------------------------------------------- + +enumerations + +#ID value text +1 0 Disable +1 1 Enable +4 0 Fallback +4 1 Normal +6 0 Emergency +6 1 Alert +6 2 Critical +6 3 Error +6 4 Warning +6 5 Notice +6 6 Info +6 7 Debug +6 8 Spew +7 0 Disable +7 1 Enable +7 2 Keep +9 0 AHCI +9 1 IDE +11 0 32M +11 1 64M +11 2 96M +11 3 128M +11 4 160M +11 5 192M +11 6 224M + +# ----------------------------------------------------------------- +checksums + +checksum 392 439 984 |