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authorMichał Żygowski <michal.zygowski@3mdeb.com>2019-12-01 17:42:04 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2020-01-12 19:28:33 +0000
commitaf258cc1791b5c46fcb13d41128cc99043a435be (patch)
tree3c143244682d60fed4172086832ae9e4ad66fd76 /src/mainboard/biostar/am1ml/bootblock.c
parentcbbfb702f693c1bbaf83a9d3d8a3c0caabda1814 (diff)
mb/*/*: use ACPIMMIO common block wherever possible
TEST=boot PC Engines apu2 and launch Debian Linux Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I648167ec94367c9494c4253bec21dab20ad7b615 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37401 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/biostar/am1ml/bootblock.c')
-rw-r--r--src/mainboard/biostar/am1ml/bootblock.c10
1 files changed, 2 insertions, 8 deletions
diff --git a/src/mainboard/biostar/am1ml/bootblock.c b/src/mainboard/biostar/am1ml/bootblock.c
index 771745e9bd..3eceaa782d 100644
--- a/src/mainboard/biostar/am1ml/bootblock.c
+++ b/src/mainboard/biostar/am1ml/bootblock.c
@@ -61,20 +61,14 @@ static void ite_gpio_conf(pnp_devfn_t dev)
void bootblock_mainboard_early_init(void)
{
- u32 reg32;
-
/* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */
pm_write8(0xea, 0x1);
/* Set auxiliary output clock frequency on OSCOUT1 pin to be 48MHz */
- reg32 = misc_read32(0x28);
- reg32 &= 0xfff8ffff;
- misc_write32(0x28, reg32);
+ misc_write32(0x28, misc_read32(0x28) & 0xfff8ffff);
/* Enable Auxiliary Clock1, disable FCH 14 MHz OscClk */
- reg32 = misc_read32(0x40);
- reg32 &= 0xffffbffb;
- misc_write32(0x49, reg32);
+ misc_write32(0x40, misc_read32(0x40) & 0xffffbffb);
/* Configure SIO as made under vendor BIOS */
ite_evc_conf(ENVC_DEV);