diff options
author | Uwe Hermann <uwe@hermann-uwe.de> | 2007-10-24 20:17:04 +0000 |
---|---|---|
committer | Uwe Hermann <uwe@hermann-uwe.de> | 2007-10-24 20:17:04 +0000 |
commit | cb00e7ab94e93dd8e4c16a025df42d8de89da3e8 (patch) | |
tree | 997a64b2099984f73f0cf66a818117885bf6d223 /src/mainboard/bcom/winnet100/Config.lb | |
parent | bf873e4ae3e95e92c829cfec1d1efacbd25ba7ea (diff) |
Some fixes for the BCOM WinNET100, mostly in Config.lb:
- Add missing entry for the NIC:
device pci 0f.0 on end # Ethernet (onboard)
- Drop the following lines:
register "com1" = "{115200}"
register "com2" = "{38400}"
Those entries hardcode the BAUD rate (as far as I can tell, please
correct me if I'm wrong). We don't want that -- instead the config option
TTYS0_BAUD in Options.lb should be used(?) I verified that dropping those
lines will not break serial output (COM1, 115200, 8n1).
- Enable IDE (PCI device 00:12.2) and add the following register lines
to tell the CS5530 code to actually enable IDE channel 0:
register "ide0_enable" = "1"
register "ide1_enable" = "0" # Not available/needed on this board
Tested with a 2.5" hard drive and FILO, works fine.
- Enable USB (PCI device 00:13.0), not sure why it was commented.
- Enable COM2 as it's used by the smartcard reader.
- Add CONFIG_COMPRESSED_PAYLOAD_LZMA to Options.lb, in order to fix
abuild for this board.
- Add some more comments.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2896 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/bcom/winnet100/Config.lb')
-rw-r--r-- | src/mainboard/bcom/winnet100/Config.lb | 96 |
1 files changed, 50 insertions, 46 deletions
diff --git a/src/mainboard/bcom/winnet100/Config.lb b/src/mainboard/bcom/winnet100/Config.lb index 32eddfbeb8..63439fa991 100644 --- a/src/mainboard/bcom/winnet100/Config.lb +++ b/src/mainboard/bcom/winnet100/Config.lb @@ -79,55 +79,59 @@ mainboardinit ./auto.inc dir /pc80 config chip.h -chip northbridge/amd/gx1 - device pci_domain 0 on - device pci 0.0 on end - chip southbridge/amd/cs5530 - device pci 12.0 on - chip superio/nsc/pc97317 - device pnp 2e.0 on # PS/2 keyboard - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 - end - device pnp 2e.1 on # PS/2 mouse - irq 0x70 = 12 - end - device pnp 2e.2 on # RTC - io 0x60 = 0x70 - irq 0x70 = 8 - end - device pnp 2e.3 off # Floppy - end - device pnp 2e.4 on # Parallel port - io 0x60 = 0x378 - irq 0x70 = 7 - end - device pnp 2e.5 off # COM2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.6 on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.7 on # GPIO - io 0x60 = 0xe0 - end - device pnp 2e.8 on # Power management - io 0x60 = 0xe800 - end - register "com1" = "{115200}" - register "com2" = "{38400}" +chip northbridge/amd/gx1 # Northbridge + device pci_domain 0 on # PCI domain + device pci 0.0 on end # Host bridge + chip southbridge/amd/cs5530 # Southbridge + device pci 0f.0 on end # Ethernet (onboard) + device pci 12.0 on # ISA bridge + chip superio/nsc/pc97317 # Super I/O + device pnp 2e.0 on # PS/2 keyboard + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 end - device pci 12.1 off end # SMI - device pci 12.2 off end # IDE - device pci 12.3 on end # Audio - device pci 12.4 on end # VGA - # device pci 13.0 on end # USB + device pnp 2e.1 on # PS/2 mouse + irq 0x70 = 12 + end + device pnp 2e.2 on # RTC, Advanced power control (APC) + io 0x60 = 0x70 + irq 0x70 = 8 + end + device pnp 2e.3 off # Floppy (N/A on this board) + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.4 on # Parallel port + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 2e.5 on # COM2 (used for smartcard reader) + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.6 on # COM1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.7 on # GPIO + io 0x60 = 0xe0 + end + device pnp 2e.8 on # Power management + io 0x60 = 0xe8 + end + end end + device pci 12.1 off end # SMI + device pci 12.2 on end # IDE + device pci 12.3 on end # Audio + device pci 12.4 on end # VGA (onboard) + device pci 13.0 on end # USB + register "ide0_enable" = "1" + register "ide1_enable" = "0" # Not available/needed on this board end end - chip cpu/amd/model_gx1 + chip cpu/amd/model_gx1 # CPU end end |