diff options
author | Fabian Kunkel <fabi@adv.bruhnspace.com> | 2016-07-26 22:11:07 +0200 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-07-31 19:58:12 +0200 |
commit | 1f9c07fcd735e2e55104d1b3a2672298a460d5fb (patch) | |
tree | cc6a9749cf7fc1e3765191439f15506fb874ab5c /src/mainboard/bap/ode_e20XX/devicetree.cb | |
parent | 449fb9b6eb886a6bd364f9f5c5617e30152c013d (diff) |
mainboard/bap/ode_e20XX: Change PCIe lines
This patch binds PCIe lanes 2 and 3 to one PCIe device.
PCIe device 2.4 becomes x2.
Tested with the connected FPGA on PCIe 2.4.
FPGA doubles transfer rate from/to the AMD.
Payload SeaBIOS 1.9.1 stable, Lubuntu 16.04, Kernel 4.4.0
Change-Id: Icee567272312a7df4c3b5a6db5b420a054ec3230
Signed-off-by: Fabian Kunkel <fabi@adv.bruhnspace.com>
Reviewed-on: https://review.coreboot.org/15905
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/bap/ode_e20XX/devicetree.cb')
-rw-r--r-- | src/mainboard/bap/ode_e20XX/devicetree.cb | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/bap/ode_e20XX/devicetree.cb b/src/mainboard/bap/ode_e20XX/devicetree.cb index a598a995ed..3e0272c0e4 100644 --- a/src/mainboard/bap/ode_e20XX/devicetree.cb +++ b/src/mainboard/bap/ode_e20XX/devicetree.cb @@ -31,8 +31,7 @@ chip northbridge/amd/agesa/family16kb/root_complex device pci 2.1 on end # x4 PCIe Slot device pci 2.2 on end # PCIe Q7 Realtek GBit LAN device pci 2.3 on end # PCIe CB Realtek GBit LAN - device pci 2.4 on end # PCIe BAP FPGA - device pci 2.5 on end # PCIe BAP FPGA (unused, for 050T) + device pci 2.4 on end # x2 PCIe Microsemi FPGA end #chip northbridge/amd/agesa/family16kb chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus |