mainboard/bap/ode_e20XX: Add different DDR3 clk settings

This patch adds two SPD files with different DDR3 clk settings.
The user can choose which setting to use.
Lower clk settings saves power under load.
SoC Model GX-411GA supports only up to DDR3-1066 clk mode.
Both SPD settings were tested with memtest for several hours.
Power saving is around half a watt under heavy memory load.
Payload SeaBIOS 1.9.1 stable, Lubuntu 16.04, Kernel 4.4.0

Change-Id: Ibb81e22e19297fdf64360bc3e213529e9d183586
Signed-off-by: Fabian Kunkel <fabi@adv.bruhnspace.com>
Reviewed-on: https://review.coreboot.org/15907
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

1 files changed, 31 insertions, 1 deletions

diff --git a/src/mainboard/bap/ode_e20XX/BiosCallOuts.c b/src/mainboard/bap/ode_e20XX/BiosCallOuts.c
index b639e9629f..787b833980 100644
--- a/src/mainboard/bap/ode_e20XX/BiosCallOuts.c
+++ b/src/mainboard/bap/ode_e20XX/BiosCallOuts.c
@@ -24,13 +24,15 @@
 #include "imc.h"
 #endif
 #include <stdlib.h>
+#include <spd_cache.h>
 
 static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr);
+static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr);
 
 const BIOS_CALLOUT_STRUCT BiosCallouts[] =
 {
 	{AGESA_DO_RESET,                 agesa_Reset },
-	{AGESA_READ_SPD,                 agesa_ReadSpd_from_cbfs },
+	{AGESA_READ_SPD,                 board_ReadSpd_from_cbfs },
 	{AGESA_READ_SPD_RECOVERY,        agesa_NoopUnsupported },
 	{AGESA_RUNFUNC_ONAP,             agesa_RunFuncOnAp },
 	{AGESA_GET_IDS_INIT_DATA,        agesa_EmptyIdsInitData },
@@ -214,3 +216,31 @@ static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
 
 	return AGESA_SUCCESS;
 }
+
+static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr)
+{
+	AGESA_STATUS Status = AGESA_UNSUPPORTED;
+#ifdef __PRE_RAM__
+	AGESA_READ_SPD_PARAMS *info = ConfigPtr;
+	u8 index;
+
+	if (IS_ENABLED(CONFIG_BAP_E20_DDR3_1066))
+		index = 1;
+	else	/* CONFIG_BAP_E20_DDR3_800 */
+		index = 0;
+
+	if (info->MemChannelId > 0)
+		return AGESA_UNSUPPORTED;
+	if (info->SocketId != 0)
+		return AGESA_UNSUPPORTED;
+	if (info->DimmId != 0)
+		return AGESA_UNSUPPORTED;
+
+	/* Read index 0, first SPD_SIZE bytes of spd.bin file. */
+	if (read_spd_from_cbfs((u8 *)info->Buffer, index) < 0)
+		die("No SPD data\n");
+
+	Status = AGESA_SUCCESS;
+#endif
+	return Status;
+}