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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-06-16 17:24:14 +1000
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-06-18 21:17:27 +0200
commitc94d73e0e6703369831fe6d489a20d71ab2bb974 (patch)
treec02321f3815f217665c57fd159fb43b2a1e47788 /src/mainboard/avalue
parent401b8accf8fdade02f40f528812ac081c7a0f432 (diff)
mainboard: Clear up remaining SIO_PORT from Kconfig
Push back any board specific values back into romstage.c #defines and drop any remaining fragments of CONFIG_SIO_PORT in-tree. Change-Id: Ieb63fb0c2ab1a82b53bafd86686de7b21ac226c3 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6045 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/avalue')
-rw-r--r--src/mainboard/avalue/eax-785e/Kconfig4
-rw-r--r--src/mainboard/avalue/eax-785e/romstage.c3
2 files changed, 2 insertions, 5 deletions
diff --git a/src/mainboard/avalue/eax-785e/Kconfig b/src/mainboard/avalue/eax-785e/Kconfig
index 4c11a8a81d..32b2affa0c 100644
--- a/src/mainboard/avalue/eax-785e/Kconfig
+++ b/src/mainboard/avalue/eax-785e/Kconfig
@@ -89,8 +89,4 @@ config VGA_BIOS_ID
string
default "1002,9712"
-config SIO_PORT
- hex
- default 0x2E
-
endif #BOARD_AVALUE_EAX_785E
diff --git a/src/mainboard/avalue/eax-785e/romstage.c b/src/mainboard/avalue/eax-785e/romstage.c
index f6a10dcb7b..883bd11cf7 100644
--- a/src/mainboard/avalue/eax-785e/romstage.c
+++ b/src/mainboard/avalue/eax-785e/romstage.c
@@ -52,6 +52,7 @@
#include "northbridge/amd/amdfam10/debug.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
+#define CLK_DEV PNP_DEV(0x2e, W83627HF_SP1)
static void activate_spd_rom(const struct mem_controller *ctrl)
{
@@ -102,7 +103,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enable_rs780_dev8();
sb800_clk_output_48Mhz();
- w83627hf_set_clksel_48(PNP_DEV(CONFIG_SIO_PORT, 0));
+ w83627hf_set_clksel_48(CLK_DEV);
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();