diff options
| author | Kerry She <shekairui@gmail.com> | 2011-09-08 21:16:19 +0800 |
|---|---|---|
| committer | Marc Jones <marcj303@gmail.com> | 2011-09-14 19:49:48 +0200 |
| commit | 7b7b2c9ef97c79ed5f6d12b4fc386db08e0691c9 (patch) | |
| tree | f1bb5524e296aefc40c1addce1f22b5ef3774d01 /src/mainboard/avalue/eax-785e/devicetree.cb | |
| parent | 8c69b1d13b12a23d22de19b9de2e161e6064021c (diff) | |
mainboard: add avalue/eax-785 ITX mainboard
It's AM3 Socket, 880M + SB850 chipset, similar with advansus/a785e-i.
Onboard device UART, VGA, SATA, PCI Slot, 2 X16 PCIe slot, 4 X1 Pcie
slot, Lan, audio, PS2 keyboard/mouse and USB are verified.
Change-Id: I483363f5ff9fbfc5cda2f0521660751212f3e326
Signed-off-by: Kerry She <kerry.she@amd.com>
Signed-off-by: Kerry She <shekairui@gmail.com>
Reviewed-on: http://review.coreboot.org/208
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/mainboard/avalue/eax-785e/devicetree.cb')
| -rw-r--r-- | src/mainboard/avalue/eax-785e/devicetree.cb | 111 |
1 files changed, 111 insertions, 0 deletions
diff --git a/src/mainboard/avalue/eax-785e/devicetree.cb b/src/mainboard/avalue/eax-785e/devicetree.cb new file mode 100644 index 0000000000..bf58f9099a --- /dev/null +++ b/src/mainboard/avalue/eax-785e/devicetree.cb @@ -0,0 +1,111 @@ +# sample config for avalue/EAX-785E +chip northbridge/amd/amdfam10/root_complex + device lapic_cluster 0 on + chip cpu/amd/socket_AM3 #L1 and DDR3 + device lapic 0 on end + end + end + device pci_domain 0 on + subsystemid 0x1612 0x3060 inherit #TODO: Set the correctly subsystem id. + chip northbridge/amd/amdfam10 + device pci 18.0 on # northbridge + chip southbridge/amd/rs780 + device pci 0.0 on end # HT 0x9600 + device pci 1.0 on end # Internal Graphics P2P bridge 0x9712 + device pci 2.0 on end # GFX_RX0-7/TX0-7 PCIEx16_1 slot + device pci 3.0 on end # GFX_RX8-15/TX8-15 PCIEx16_2 slot + device pci 4.0 on end # PortB GPP_RX/TX0 PCIEx1_1 slot + device pci 5.0 on end # PortC GPP_RX/TX1 PCIEx1_2 slot + device pci 6.0 on end # PortD GPP_RX/TX2 PCIEx1_3 slot + device pci 7.0 on end # PortE GPP_RX/TX3 PCIEx1_4 slot + device pci 8.0 off end # NB/SB Link P2P bridge + device pci 9.0 on end # Ethernet + device pci a.0 on end # Ethernet + register "gppsb_configuration" = "4" # Configuration E + register "gpp_configuration" = "3" # Configuration D + register "port_enable" = "0x6FE" + register "gfx_dev2_dev3" = "0" #no use + register "gfx_dual_slot" = "1" # 0 single slot, 1 dual slot + register "gfx_lane_reversal" = "0" + register "gfx_compliance" = "0" + register "gfx_reconfiguration" = "1" + register "gfx_link_width" = "0" + register "gfx_tmds" = "1" + register "gfx_pcie_config" = "4" # 2x8 GFX, one on Lanes 0-7, one on Lanes 8-15 + register "gfx_ddi_config" = "0" # no DDI_SL + end + chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pci bus + device pci 11.0 on end # SATA + device pci 12.0 on end # USB + device pci 12.2 on end # USB + device pci 13.0 on end # USB + device pci 13.2 on end # USB + device pci 14.0 on end # SM + device pci 14.1 on end # IDE 0x439c + device pci 14.2 on end # HDA 0x4383 + device pci 14.3 on + chip superio/winbond/w83627hf + device pnp 2e.0 off # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.1 off # Parallel Port + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 2e.2 on # Com1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.3 on # Com2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.5 on # PS/2 Keyboard & mouse + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + irq 0x72 = 12 + end + device pnp 2e.6 off # SFI + io 0x62 = 0x100 + end + device pnp 2e.7 off # GPIO_GAME_MIDI + io 0x60 = 0x220 + io 0x62 = 0x300 + irq 0x70 = 9 + end + device pnp 2e.8 off end # WDTO_PLED + device pnp 2e.9 off end # GPIO_SUSLED + device pnp 2e.a off end # ACPI + device pnp 2e.b on # HW Monitor + io 0x60 = 0x290 + irq 0x70 = 5 + end + end #superio/winbond/w83627hf + end # LPC 0x439d + device pci 14.4 on end # PCIB 0x4384, NOTE: PCI interface pins shared with GPIO {GPIO 35:0} + device pci 14.5 on end # USB 2 + device pci 14.6 off end # Gec + device pci 15.0 off end # PCIe 0 + device pci 15.1 off end # PCIe 1 + device pci 15.2 off end # PCIe 2 + device pci 15.3 on end # PCIe 3 + device pci 16.0 on end # USB + device pci 16.2 on end # USB + #register "gpp_configuration" = "0" #4:0:0:0 + #register "gpp_configuration" = "2" #2:2:0:0 + #register "gpp_configuration" = "3" #2:1:1:0 + register "gpp_configuration" = "4" #1:1:1:1 + register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE + end #southbridge/amd/cimx/sb800 + end # device pci 18.0 + + device pci 18.1 on end + device pci 18.2 on end + device pci 18.3 on end + device pci 18.4 on end + end + end #pci_domain +end |