Use DIMM0 et al in lots more places instead of hardocding values.

The (0xa << 3) expression equals 0x50, i.e. DIMM0.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6103 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 25 insertions, 20 deletions

diff --git a/src/mainboard/asus/a8n_e/romstage.c b/src/mainboard/asus/a8n_e/romstage.c
index b9253aa4c4..155f414668 100644
--- a/src/mainboard/asus/a8n_e/romstage.c
+++ b/src/mainboard/asus/a8n_e/romstage.c
@@ -48,6 +48,7 @@
 #include "northbridge/amd/amdk8/setup_resource_map.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
 #include "cpu/amd/dualcore/dualcore.c"
+#include <spd.h>
 
 static void memreset(int controllers, const struct mem_controller *ctrl)
 {
@@ -93,11 +94,11 @@ static void sio_setup(void)
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	static const uint16_t spd_addr[] = {
-		(0xa << 3) | 0, (0xa << 3) | 2, 0, 0,
-		(0xa << 3) | 1, (0xa << 3) | 3, 0, 0,
+		DIMM0, DIMM2, 0, 0,
+		DIMM1, DIMM3, 0, 0,
 #if CONFIG_MAX_PHYSICAL_CPUS > 1
-		(0xa << 3) | 4, (0xa << 3) | 6, 0, 0,
-		(0xa << 3) | 5, (0xa << 3) | 7, 0, 0,
+		DIMM4, DIMM6, 0, 0,
+		DIMM5, DIMM7, 0, 0,
 #endif
 	};
 
diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c
index 1903adc97d..fbefe34c0e 100644
--- a/src/mainboard/asus/a8v-e_deluxe/romstage.c
+++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c
@@ -46,6 +46,7 @@ unsigned int get_sbdn(unsigned bus);
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
+#include <spd.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
 #define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED)
@@ -154,11 +155,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	static const uint16_t spd_addr[] = {
 		// Node 0
-		(0xa << 3) | 0, (0xa << 3) | 2, 0, 0,
-		(0xa << 3) | 1, (0xa << 3) | 3, 0, 0,
+		DIMM0, DIMM2, 0, 0,
+		DIMM1, DIMM3, 0, 0,
 		// Node 1
-		(0xa << 3) | 4, (0xa << 3) | 6, 0, 0,
-		(0xa << 3) | 5, (0xa << 3) | 7, 0, 0,
+		DIMM4, DIMM6, 0, 0,
+		DIMM5, DIMM7, 0, 0,
 	};
 	unsigned bsp_apicid = 0;
 	int needs_reset = 0;
diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c
index 1903adc97d..fbefe34c0e 100644
--- a/src/mainboard/asus/a8v-e_se/romstage.c
+++ b/src/mainboard/asus/a8v-e_se/romstage.c
@@ -46,6 +46,7 @@ unsigned int get_sbdn(unsigned bus);
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
+#include <spd.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
 #define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED)
@@ -154,11 +155,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	static const uint16_t spd_addr[] = {
 		// Node 0
-		(0xa << 3) | 0, (0xa << 3) | 2, 0, 0,
-		(0xa << 3) | 1, (0xa << 3) | 3, 0, 0,
+		DIMM0, DIMM2, 0, 0,
+		DIMM1, DIMM3, 0, 0,
 		// Node 1
-		(0xa << 3) | 4, (0xa << 3) | 6, 0, 0,
-		(0xa << 3) | 5, (0xa << 3) | 7, 0, 0,
+		DIMM4, DIMM6, 0, 0,
+		DIMM5, DIMM7, 0, 0,
 	};
 	unsigned bsp_apicid = 0;
 	int needs_reset = 0;
diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c
index 91a75adfb8..e0b61fcbdb 100644
--- a/src/mainboard/asus/m2v-mx_se/romstage.c
+++ b/src/mainboard/asus/m2v-mx_se/romstage.c
@@ -49,6 +49,7 @@ unsigned int get_sbdn(unsigned bus);
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
+#include <spd.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
 #define WATCHDOG_DEV PNP_DEV(0x2e, IT8712F_GPIO)
@@ -128,11 +129,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	static const uint16_t spd_addr[] = {
 		// Node 0
-		(0xa << 3) | 0, (0xa << 3) | 2, 0, 0,
-		(0xa << 3) | 1, (0xa << 3) | 3, 0, 0,
+		DIMM0, DIMM2, 0, 0,
+		DIMM1, DIMM3, 0, 0,
 		// Node 1
-		(0xa << 3) | 4, (0xa << 3) | 6, 0, 0,
-		(0xa << 3) | 5, (0xa << 3) | 7, 0, 0,
+		DIMM4, DIMM6, 0, 0,
+		DIMM5, DIMM7, 0, 0,
 	};
 	unsigned bsp_apicid = 0;
 	int needs_reset = 0;
diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c
index 7237568b15..d54d2d5efb 100644
--- a/src/mainboard/asus/m2v/romstage.c
+++ b/src/mainboard/asus/m2v/romstage.c
@@ -49,6 +49,7 @@ unsigned int get_sbdn(unsigned bus);
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
+#include <spd.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
 #define WATCHDOG_DEV PNP_DEV(0x2e, IT8712F_GPIO)
@@ -231,11 +232,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	static const uint16_t spd_addr[] = {
 		// Node 0
-		(0xa << 3) | 0, (0xa << 3) | 2, 0, 0,
-		(0xa << 3) | 1, (0xa << 3) | 3, 0, 0,
+		DIMM0, DIMM2, 0, 0,
+		DIMM1, DIMM3, 0, 0,
 		// Node 1
-		(0xa << 3) | 4, (0xa << 3) | 6, 0, 0,
-		(0xa << 3) | 5, (0xa << 3) | 7, 0, 0,
+		DIMM4, DIMM6, 0, 0,
+		DIMM5, DIMM7, 0, 0,
 	};
 	unsigned bsp_apicid = 0;
 	int needs_reset = 0;