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author | Marx Wang <marx.wang@intel.corp-partner.google.com> | 2024-02-20 23:15:42 +0800 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2024-02-23 14:28:52 +0000 |
commit | 961ed9fe27108ef46fc6c0f2aad340bb02e09081 (patch) | |
tree | baa0ab131227a8c0dfaf9975a07c1aa65a5f72ed /src/mainboard/asus | |
parent | 6cc725466bcb4636fc91733b28df7c24c7016df7 (diff) |
soc/intel/adl: Set slp-s0 counter frequency
System sleep time (SLP_S0 signal asserted) is measured in ticks, for
Alder Lake soc in 122us (i.e. ~8197Hz) granularity/ticks.
BUG=b:301854636
TEST=/sys/devices/system/cpu/cpuidle/
low_power_idle_system_residency_us" will show system idle residency time
Change-Id: I449f7ed0d9ef891ae5266e8fd784a063a75e38eb
Signed-off-by: Marx Wang <marx.wang@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80665
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/asus')
0 files changed, 0 insertions, 0 deletions