asus/am1i-a: fix the blue "USB 3.0" ports for OHCI/EHCI "USB 2.0" mode

Set up the proper IRQ routing for OHCI/EHCI devices which appear if
XHCI controller is disabled (CONFIG_HUDSON_XHCI_ENABLE is not set).
Now both "USB 3.0" ports are working fine at OHCI/EHCI "USB 2.0" mode.
They also work fine if XHCI controller is enabled.

Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Change-Id: I50a773eeab890627abc963e0a61f781d1cea3259
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38241
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>

6 files changed, 27 insertions, 8 deletions

diff --git a/src/mainboard/asus/am1i-a/Kconfig b/src/mainboard/asus/am1i-a/Kconfig
index a0dae9f6a6..172d8087f1 100644
--- a/src/mainboard/asus/am1i-a/Kconfig
+++ b/src/mainboard/asus/am1i-a/Kconfig
@@ -37,7 +37,7 @@ config MAX_CPUS
 
 config IRQ_SLOT_COUNT
 	int
-	default 9
+	default 10
 
 config ONBOARD_VGA_IS_PRIMARY
 	bool
diff --git a/src/mainboard/asus/am1i-a/acpi/routing.asl b/src/mainboard/asus/am1i-a/acpi/routing.asl
index 95881fa638..8b21a25776 100644
--- a/src/mainboard/asus/am1i-a/acpi/routing.asl
+++ b/src/mainboard/asus/am1i-a/acpi/routing.asl
@@ -48,8 +48,14 @@ Name(PR0, Package(){
 	Package(){0x0013FFFF, 0, INTC, 0 },
 	Package(){0x0013FFFF, 1, INTB, 0 },
 
-	/* Bus 0, Dev 10 Func 0 - USB: XHCI */
+	/* Bus 0, Dev 16 Func 0 - USB: OHCI */
+	/* Bus 0, Dev 16 Func 2 - USB: EHCI */
+	Package(){0x0016FFFF, 0, INTC, 0 },
+	Package(){0x0016FFFF, 1, INTB, 0 },
+
+	/* Bus 0, Dev 10 - USB: XHCI func 0, 1 */
 	Package(){0x0010FFFF, 0, INTC, 0 },
+	Package(){0x0010FFFF, 1, INTB, 0 },
 
 	/* Bus 0, Dev 11 - SATA controller */
 	Package(){0x0011FFFF, 0, INTD, 0 },
@@ -87,8 +93,14 @@ Name(APR0, Package(){
 	Package(){0x0013FFFF, 0, 0, 18 },
 	Package(){0x0013FFFF, 1, 0, 17 },
 
-	/* Bus 0, Dev 10, Func 0 - USB: XHCI */
+	/* Bus 0, Dev 16 Func 0 - USB: OHCI */
+	/* Bus 0, Dev 16 Func 1 - USB: EHCI */
+	Package(){0x0016FFFF, 0, 0, 18 },
+	Package(){0x0016FFFF, 1, 0, 17 },
+
+	/* Bus 0, Dev 10 - USB: XHCI func 0, 1 */
 	Package(){0x0010FFFF, 0, 0, 18 },
+	Package(){0x0010FFFF, 1, 0, 17 },
 
 	/* Bus 0, Dev 11 - SATA controller */
 	Package(){0x0011FFFF, 0, 0, 19 },
diff --git a/src/mainboard/asus/am1i-a/devicetree.cb b/src/mainboard/asus/am1i-a/devicetree.cb
index 8e44874edd..2d7265a20d 100644
--- a/src/mainboard/asus/am1i-a/devicetree.cb
+++ b/src/mainboard/asus/am1i-a/devicetree.cb
@@ -84,6 +84,8 @@ chip northbridge/amd/agesa/family16kb/root_complex
 				end
 			end	#device pci 14.3 # LPC
 			device pci 14.7 off  end # SD - no card reader present
+			device pci 16.0 on end # OHCI USB
+			device pci 16.2 on end # EHCI USB
 		end	#chip southbridge/amd/agesa/hudson
 
 		chip northbridge/amd/agesa/family16kb
diff --git a/src/mainboard/asus/am1i-a/irq_tables.c b/src/mainboard/asus/am1i-a/irq_tables.c
index c8ccbeb231..84110d1882 100644
--- a/src/mainboard/asus/am1i-a/irq_tables.c
+++ b/src/mainboard/asus/am1i-a/irq_tables.c
@@ -26,7 +26,7 @@ const struct irq_routing_table intel_irq_routing_table = {
 	0x439d,					/* Device */
 	0,					/* Miniport */
 	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },	/* u8 rfu[11] */
-	0xa8,					/* Checksum (has to be set to some value that
+	0x3b,					/* Checksum (has to be set to some value that
 						* would give 0 after the sum of all bytes
 						* for this structure (including checksum).
 						*/
@@ -39,6 +39,7 @@ const struct irq_routing_table intel_irq_routing_table = {
 		{0x00, (0x12 << 3) | 0x0, {{0x03, 0x9cb8}, {0x02, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
 		{0x00, (0x13 << 3) | 0x0, {{0x03, 0x9cb8}, {0x02, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
 		{0x00, (0x14 << 3) | 0x0, {{0x01, 0x9cb8}, {0x02, 0x9cb8}, {0x03, 0x9cb8}, {0x04, 0x9cb8}}, 0x0, 0x0},
+		{0x00, (0x16 << 3) | 0x0, {{0x03, 0x9cb8}, {0x02, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
 		{0x01, (0x00 << 3) | 0x0, {{0x01, 0x9cb8}, {0x02, 0x9cb8}, {0x03, 0x9cb8}, {0x04, 0x9cb8}}, 0x0, 0x0},
 		{0x02, (0x00 << 3) | 0x0, {{0x02, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
 	}
diff --git a/src/mainboard/asus/am1i-a/mainboard.c b/src/mainboard/asus/am1i-a/mainboard.c
index ecf4006273..f9a12e58dc 100644
--- a/src/mainboard/asus/am1i-a/mainboard.c
+++ b/src/mainboard/asus/am1i-a/mainboard.c
@@ -34,8 +34,8 @@ static const u8 mainboard_picr_data[FCH_INT_TABLE_SIZE] = {
 	[0x10] = 0x1F,0x1F,0x1F,0x03,0x1F,0x1F,0x1F,0x1F,
 	/* IMC INT0 - 5 */
 	[0x20] = 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
-	/* USB Devs 18/19 INTA-B */
-	[0x30] = 0x05,0x04,0x05,0x04,0x1F,0x1F,
+	/* USB Devs 18/19/22 INTA-B */
+	[0x30] = 0x05,0x04,0x05,0x04,0x05,0x04,0x1F,0x1F,
 	/* RSVD, SATA */
 	[0x40] = 0x1F, 0x07
 };
@@ -49,8 +49,8 @@ static const u8 mainboard_intr_data[FCH_INT_TABLE_SIZE] = {
 	[0x10] = 0x09,0x1F,0x1F,0x10,0x1F,0x1F,0x1F,0x1F,
 	/* IMC INT0 - 5 */
 	[0x20] = 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
-	/* USB Devs 18/19 INTA-B */
-	[0x30] = 0x12,0x11,0x12,0x11,0x1F,0x1F,
+	/* USB Devs 18/19/22 INTA-B */
+	[0x30] = 0x12,0x11,0x12,0x11,0x12,0x11,0x1F,0x1F,
 	/* RSVD, SATA */
 	[0x40] = 0x1F, 0x13
 };
@@ -77,6 +77,8 @@ static const struct pirq_struct mainboard_pirq_data[] = {
 	{EHCI1_DEVFN,	{PIRQ_NC, PIRQ_EHCI1, PIRQ_NC, PIRQ_NC}},	/* EHCI1:	12.2 */
 	{OHCI2_DEVFN,	{PIRQ_OHCI2, PIRQ_NC, PIRQ_NC, PIRQ_NC}},	/* OHCI2:	13.0 */
 	{EHCI2_DEVFN,	{PIRQ_NC, PIRQ_EHCI2, PIRQ_NC, PIRQ_NC}},	/* EHCI2:	13.2 */
+	{OHCI3_DEVFN,	{PIRQ_OHCI3, PIRQ_NC, PIRQ_NC, PIRQ_NC}},	/* OHCI3:	16.0 */
+	{EHCI3_DEVFN,	{PIRQ_NC, PIRQ_EHCI3, PIRQ_NC, PIRQ_NC}},	/* EHCI3:	16.2 */
 	{HDA_DEVFN,		{PIRQ_HDA, PIRQ_NC, PIRQ_NC, PIRQ_NC}},		/* HDA:		14.2 */
 };
 
diff --git a/src/mainboard/asus/am1i-a/mptable.c b/src/mainboard/asus/am1i-a/mptable.c
index 9efcab35b9..3a6131f1d2 100644
--- a/src/mainboard/asus/am1i-a/mptable.c
+++ b/src/mainboard/asus/am1i-a/mptable.c
@@ -91,6 +91,8 @@ static void *smp_write_config_table(void *v)
 	PCI_INT(0x0, 0x12, 0x1, intr_data_ptr[PIRQ_EHCI1]);
 	PCI_INT(0x0, 0x13, 0x0, intr_data_ptr[PIRQ_OHCI2]);
 	PCI_INT(0x0, 0x13, 0x1, intr_data_ptr[PIRQ_EHCI2]);
+	PCI_INT(0x0, 0x16, 0x0, intr_data_ptr[PIRQ_OHCI3]);
+	PCI_INT(0x0, 0x16, 0x1, intr_data_ptr[PIRQ_EHCI3]);
 
 	/* Southbridge HD Audio */
 	PCI_INT(0x0, 0x14, 0x0, intr_data_ptr[PIRQ_HDA]);