diff options
| author | Timothy Pearson <tpearson@raptorengineering.com> | 2017-01-04 14:26:26 -0600 |
|---|---|---|
| committer | Timothy Pearson <tpearson@raptorengineering.com> | 2017-01-05 21:53:55 +0100 |
| commit | 7ad4dc5e9914e927a827ce48a030d2d04e7ec792 (patch) | |
| tree | 1a279d488f9730ff954a7783dfde95c275c1a09c /src/mainboard/asus | |
| parent | d502dc092a26726472fc5871c77ebff192be4cb8 (diff) | |
src/amd: Add common definition of AMD ACPI MMIO address
The bare ACPI MMIO address 0xFED80000 was used in multiple
AMD mainboard files as well as the SB800 native code. Reduce
duplication by using a centrally defined value for all AMD
ACPI MMIO access.
Change-Id: I39a30c0d0733096dbd5892c9e18855aa5bb5a4a7
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Reviewed-on: https://review.coreboot.org/18032
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/asus')
| -rw-r--r-- | src/mainboard/asus/f2a85-m/romstage.c | 4 | ||||
| -rw-r--r-- | src/mainboard/asus/m5a88-v/mainboard.c | 5 |
2 files changed, 5 insertions, 4 deletions
diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index b5aff9f46b..51cadc7a92 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -29,6 +29,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <device/pnp_def.h> +#include <southbridge/amd/common/amd_defs.h> #include <southbridge/amd/agesa/hudson/hudson.h> #include <southbridge/amd/agesa/hudson/smbus.h> #include <stdint.h> @@ -38,8 +39,7 @@ #define MMIO_NON_POSTED_START 0xfed00000 #define MMIO_NON_POSTED_END 0xfedfffff -#define SB_MMIO 0xFED80000 -#define SB_MMIO_MISC32(x) *(volatile u32 *)(SB_MMIO + 0xE00 + (x)) +#define SB_MMIO_MISC32(x) *(volatile u32 *)(AMD_SB_ACPI_MMIO_ADDR + 0xE00 + (x)) #define SERIAL_DEV PNP_DEV(0x2e, IT8728F_SP1) #define GPIO_DEV PNP_DEV(0x2e, IT8728F_GPIO) diff --git a/src/mainboard/asus/m5a88-v/mainboard.c b/src/mainboard/asus/m5a88-v/mainboard.c index 3e20044e68..256d88992b 100644 --- a/src/mainboard/asus/m5a88-v/mainboard.c +++ b/src/mainboard/asus/m5a88-v/mainboard.c @@ -19,6 +19,7 @@ #include <arch/io.h> #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> +#include <southbridge/amd/common/amd_defs.h> #include <device/pci_def.h> u8 is_dev3_present(void); @@ -34,12 +35,12 @@ void enable_int_gfx(void) /* make sure the MMIO(fed80000) is accessible */ // FIXME: RWPMIO(SB_PMIOA_REG24, AccWidthUint8, ~(BIT0), BIT0); - gpio_reg = (volatile u8 *)0xFED80000 + 0xD00; /* IoMux Register */ + gpio_reg = (volatile u8 *)AMD_SB_ACPI_MMIO_ADDR + 0xD00; /* IoMux Register */ *(gpio_reg + 0x6) = 0x1; /* Int_vga_en */ *(gpio_reg + 170) = 0x1; /* gpio_gate */ - gpio_reg = (volatile u8 *)0xFED80000 + 0x100; /* GPIO Registers */ + gpio_reg = (volatile u8 *)AMD_SB_ACPI_MMIO_ADDR + 0x100; /* GPIO Registers */ *(gpio_reg + 0x6) = 0x8; *(gpio_reg + 170) = 0x0; |