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authorArthur Heymans <arthur@aheymans.xyz>2017-02-08 18:12:31 +0100
committerNico Huber <nico.h@gmx.de>2017-06-06 18:59:40 +0200
commit00b9f4c4b1cd95a6cafe2b1e66641ff0f113082e (patch)
treea2b876df036af53952bb49d7efe6c9971323c816 /src/mainboard/asus
parentb40e5c72b727211752a6e18156280edf067cddce (diff)
mb/*/*/cmos.layout: Make multibyte options byte aligned
Changes the offsets of some options so that options that span multiple bytes are byte aligned. To make the cmos.layout file more consistent some things where moved around in the cmos.layout of thinkpads X200 and T400. Change-Id: Ic84a2a5dc6f9c102f041085871c2ed55e2f3692a Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18321 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/asus')
-rw-r--r--src/mainboard/asus/kcma-d8/cmos.layout6
-rw-r--r--src/mainboard/asus/kfsn4-dre/cmos.layout3
-rw-r--r--src/mainboard/asus/kgpe-d16/cmos.layout6
3 files changed, 10 insertions, 5 deletions
diff --git a/src/mainboard/asus/kcma-d8/cmos.layout b/src/mainboard/asus/kcma-d8/cmos.layout
index b9dadf4335..0bab4c9dd2 100644
--- a/src/mainboard/asus/kcma-d8/cmos.layout
+++ b/src/mainboard/asus/kcma-d8/cmos.layout
@@ -22,13 +22,14 @@ entries
384 1 e 4 boot_option
388 4 h 0 reboot_counter
393 3 e 5 baud_rate
-396 5 e 10 ecc_scrub_rate
+#396 5 unused
401 1 e 1 interleave_chip_selects
402 1 e 1 interleave_nodes
403 1 e 1 interleave_memory_channels
404 4 e 8 max_mem_clock
408 1 e 2 multi_core
412 4 e 6 debug_level
+416 5 e 10 ecc_scrub_rate
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 gart
@@ -42,7 +43,7 @@ entries
466 1 e 1 cpu_cc6_state
467 1 e 1 sata_ahci_mode
468 1 e 1 sata_alpm
-469 4 h 0 maximum_p_state_limit
+#469 4 unused
473 2 e 13 dimm_spd_checksum
475 1 e 14 probe_filter
476 1 e 1 l3_cache_partitioning
@@ -51,6 +52,7 @@ entries
480 1 e 2 ehci_async_data_cache
481 1 e 1 experimental_memory_speed_boost
482 1 r 0 allow_spd_nvram_cache_restore
+483 4 h 0 maximum_p_state_limit
728 256 h 0 user_data
984 16 h 0 check_sum
# Reserve the extended AMD configuration registers
diff --git a/src/mainboard/asus/kfsn4-dre/cmos.layout b/src/mainboard/asus/kfsn4-dre/cmos.layout
index 169af87b9b..d0f6211b7a 100644
--- a/src/mainboard/asus/kfsn4-dre/cmos.layout
+++ b/src/mainboard/asus/kfsn4-dre/cmos.layout
@@ -22,13 +22,14 @@ entries
384 1 e 4 boot_option
388 4 h 0 reboot_counter
393 3 e 5 baud_rate
-396 5 e 10 ecc_scrub_rate
+#396 5 unused
401 1 e 1 interleave_chip_selects
402 1 e 1 interleave_nodes
403 1 e 1 interleave_memory_channels
404 2 e 8 max_mem_clock
406 1 e 2 multi_core
412 4 e 6 debug_level
+416 5 e 10 ecc_scrub_rate
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 gart
diff --git a/src/mainboard/asus/kgpe-d16/cmos.layout b/src/mainboard/asus/kgpe-d16/cmos.layout
index 18c7a3fab7..e65f7c8448 100644
--- a/src/mainboard/asus/kgpe-d16/cmos.layout
+++ b/src/mainboard/asus/kgpe-d16/cmos.layout
@@ -22,13 +22,14 @@ entries
384 1 e 4 boot_option
388 4 h 0 reboot_counter
393 3 e 5 baud_rate
-396 5 e 10 ecc_scrub_rate
+#396 5 unused
401 1 e 1 interleave_chip_selects
402 1 e 1 interleave_nodes
403 1 e 1 interleave_memory_channels
404 4 e 8 max_mem_clock
408 1 e 2 multi_core
412 4 e 6 debug_level
+416 5 e 10 ecc_scrub_rate
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 gart
@@ -42,7 +43,7 @@ entries
466 1 e 1 cpu_cc6_state
467 1 e 1 sata_ahci_mode
468 1 e 1 sata_alpm
-469 4 h 0 maximum_p_state_limit
+#469 4 unused
473 2 e 13 dimm_spd_checksum
475 1 e 14 probe_filter
476 1 e 1 l3_cache_partitioning
@@ -52,6 +53,7 @@ entries
480 1 e 2 ehci_async_data_cache
481 1 e 1 experimental_memory_speed_boost
482 1 r 0 allow_spd_nvram_cache_restore
+483 4 h 0 maximum_p_state_limit
728 256 h 0 user_data
984 16 h 0 check_sum
# Reserve the extended AMD configuration registers