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authorElyes HAOUAS <ehaouas@noos.fr>2020-01-11 19:21:07 +0100
committerNico Huber <nico.h@gmx.de>2020-01-13 11:18:31 +0000
commitb7da27ccf462b70261021ac550bea49203de1ca4 (patch)
tree08fabb0c58a35f1225b3338cd0b3e1aa5fbbb896 /src/mainboard/asus/p8z77-m_pro
parent293b5b35318588037abf359e2f8ad9adac40fb98 (diff)
mb/asus/p8z77-m_pro: Fix typos
Change-Id: I3c63ca745bf10ec0b0c4cef898db3f7ebfee5bde Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38364 Reviewed-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus/p8z77-m_pro')
-rw-r--r--src/mainboard/asus/p8z77-m_pro/early_init.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/asus/p8z77-m_pro/early_init.c b/src/mainboard/asus/p8z77-m_pro/early_init.c
index e60f2f3037..800d975d0f 100644
--- a/src/mainboard/asus/p8z77-m_pro/early_init.c
+++ b/src/mainboard/asus/p8z77-m_pro/early_init.c
@@ -44,8 +44,8 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 2, 4 }, /* Port 9: USB2 internal header USB910, bottom */
{ 1, 2, 6 }, /* Port 10: USB2 internal header USB1112, top */
{ 1, 2, 5 }, /* Port 11: USB2 internal header USB1112, bottom */
- { 0, 2, 5 }, /* Port 12: Unused. Asus propietary DEBUG_PORT ??? */
- { 0, 2, 6 } /* Port 13: Unused. Asus propietary DEBUG_PORT ??? */
+ { 0, 2, 5 }, /* Port 12: Unused. Asus proprietary DEBUG_PORT ??? */
+ { 0, 2, 6 } /* Port 13: Unused. Asus proprietary DEBUG_PORT ??? */
};
void bootblock_mainboard_early_init(void)
@@ -157,7 +157,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
/* ASUS P8Z77-M Pro manual says 1.35v DIMMs are supported */
.ddr3lv_support = 1,
/* PCIe 3.0 support. As we use Ivy Bridge, let's enable it,
- * but might cause some system inestability !
+ * but might cause some system instability !
*/
.pcie_init = 1,
/* Command Rate. 0=Auto; 1=1N; 2=2N.