mb/*: Update SPD mapping for sandybridge boards

Boards without HAVE_SPD_IN_CBFS: Move SPD mapping into devicetree.

Boards with HAVE_SPD_IN_CBFS: Convert to Haswell-style SPD mapping.

Change-Id: Id6ac0a36b2fc0b9686f6e875dd020ae8dba72a72
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76967
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>

7 files changed, 1 insertions, 64 deletions

diff --git a/src/mainboard/asus/p8x7x-series/devicetree.cb b/src/mainboard/asus/p8x7x-series/devicetree.cb
index 2913519ca9..cd4336f19e 100644
--- a/src/mainboard/asus/p8x7x-series/devicetree.cb
+++ b/src/mainboard/asus/p8x7x-series/devicetree.cb
@@ -6,6 +6,7 @@ chip northbridge/intel/sandybridge
 	register "ddr3lv_support" = "1"
 	# FIXME: Nothing can run native at 800MHz on p8z77-m, others may have same problem
 	register "max_mem_clock_mhz" = "CONFIG(USE_NATIVE_RAMINIT) ? 666 : 800"
+	register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
 
 	register "usb_port_config" = "{
 		{1, 0, 0x0080}, {1, 0, 0x0080}, {1, 1, 0x0080}, {1, 1, 0x0080}, {1, 2, 0x0080},
diff --git a/src/mainboard/asus/p8x7x-series/variants/p8c_ws/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8c_ws/early_init.c
index 9f84b49e6b..79b67f07f1 100644
--- a/src/mainboard/asus/p8x7x-series/variants/p8c_ws/early_init.c
+++ b/src/mainboard/asus/p8x7x-series/variants/p8c_ws/early_init.c
@@ -2,7 +2,6 @@
 
 #include <bootblock_common.h>
 #include <device/pnp_ops.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <superio/nuvoton/common/nuvoton.h>
 #include <superio/nuvoton/nct6776/nct6776.h>
@@ -52,11 +51,3 @@ void bootblock_mainboard_early_init(void)
 	/* Enable UART */
 	nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
-
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
-	read_spd(&spd[0], 0x50, id_only);
-	read_spd(&spd[1], 0x51, id_only);
-	read_spd(&spd[2], 0x52, id_only);
-	read_spd(&spd[3], 0x53, id_only);
-}
diff --git a/src/mainboard/asus/p8x7x-series/variants/p8h77-v/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8h77-v/early_init.c
index 3a297f9e38..89f9eee106 100644
--- a/src/mainboard/asus/p8x7x-series/variants/p8h77-v/early_init.c
+++ b/src/mainboard/asus/p8x7x-series/variants/p8h77-v/early_init.c
@@ -2,7 +2,6 @@
 
 #include <bootblock_common.h>
 #include <device/pnp_ops.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <superio/nuvoton/common/nuvoton.h>
 #include <superio/nuvoton/nct6779d/nct6779d.h>
@@ -50,11 +49,3 @@ void bootblock_mainboard_early_init(void)
 	/* Enable UART */
 	nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
-
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
-	read_spd(&spd[0], 0x50, id_only);
-	read_spd(&spd[1], 0x51, id_only);
-	read_spd(&spd[2], 0x52, id_only);
-	read_spd(&spd[3], 0x53, id_only);
-}
diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/early_init.c
index fdb0a455a5..47c5cb302d 100644
--- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/early_init.c
+++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/early_init.c
@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <bootblock_common.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
 #include <northbridge/intel/sandybridge/raminit.h>
 #include <northbridge/intel/sandybridge/pei_data.h>
 #include <southbridge/intel/bd82x6x/pch.h>
@@ -42,20 +41,8 @@ void bootblock_mainboard_early_init(void)
 	 */
 }
 
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
-	read_spd(&spd[0], 0x50, id_only);
-	read_spd(&spd[1], 0x51, id_only);
-	read_spd(&spd[2], 0x52, id_only);
-	read_spd(&spd[3], 0x53, id_only);
-}
-
 void mainboard_fill_pei_data(struct pei_data *pei)
 {
-	const uint8_t spdaddr[] = {0xa0, 0xa2, 0xa4, 0xa6}; /* SMBus mul 2 */
-
-	memcpy(pei->spd_addresses, &spdaddr, sizeof(spdaddr));
-
 	/*
 	 * USB 3 mode settings.
 	 * These are obtained from option table then bit masked to keep within range.
diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c
index ac3eb42039..c8d5e33cbc 100644
--- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c
+++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c
@@ -1,9 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <arch/hpet.h>
 #include <bootblock_common.h>
 #include <device/pnp_ops.h>
-#include <northbridge/intel/sandybridge/sandybridge.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 
 #include <superio/nuvoton/common/nuvoton.h>
@@ -11,7 +9,6 @@
 
 #include <option.h>
 
-#include <northbridge/intel/sandybridge/raminit_native.h>
 #include <northbridge/intel/sandybridge/raminit.h>
 #include <northbridge/intel/sandybridge/pei_data.h>
 
@@ -48,20 +45,8 @@ void bootblock_mainboard_early_init(void)
 	nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
 
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
-	read_spd(&spd[0], 0x50, id_only);
-	read_spd(&spd[1], 0x51, id_only);
-	read_spd(&spd[2], 0x52, id_only);
-	read_spd(&spd[3], 0x53, id_only);
-}
-
 void mainboard_fill_pei_data(struct pei_data *pei_data)
 {
-	const uint8_t spdaddr[] = {0xa0, 0xa2, 0xa4, 0xa6}; /* SMBus mul 2 */
-
-	memcpy(pei_data->spd_addresses, &spdaddr, sizeof(pei_data->spd_addresses));
-
 	/*
 	 * USB3 mode:
 	 * 0 = Disable: work always as USB 2.0(ehci)
diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c
index 42b4ebc6dc..c16b055aa4 100644
--- a/src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c
+++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c
@@ -2,7 +2,6 @@
 
 #include <bootblock_common.h>
 #include <device/pnp_ops.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/common/gpio.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <superio/nuvoton/common/nuvoton.h>
@@ -47,11 +46,3 @@ void bootblock_mainboard_early_init(void)
 	/* Enable UART */
 	nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
-
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
-	read_spd(&spd[0], 0x50, id_only);
-	read_spd(&spd[1], 0x51, id_only);
-	read_spd(&spd[2], 0x52, id_only);
-	read_spd(&spd[3], 0x53, id_only);
-}
diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/early_init.c
index 3a297f9e38..89f9eee106 100644
--- a/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/early_init.c
+++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/early_init.c
@@ -2,7 +2,6 @@
 
 #include <bootblock_common.h>
 #include <device/pnp_ops.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <superio/nuvoton/common/nuvoton.h>
 #include <superio/nuvoton/nct6779d/nct6779d.h>
@@ -50,11 +49,3 @@ void bootblock_mainboard_early_init(void)
 	/* Enable UART */
 	nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
-
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
-	read_spd(&spd[0], 0x50, id_only);
-	read_spd(&spd[1], 0x51, id_only);
-	read_spd(&spd[2], 0x52, id_only);
-	read_spd(&spd[3], 0x53, id_only);
-}