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authorAngel Pons <th3fanbus@gmail.com>2020-02-24 12:01:26 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-04-20 06:55:14 +0000
commitfe7c2b996bbb011f5e0bb66b56c2438776bd0174 (patch)
tree1431f585c8cfcab8d72ae24607f003374e11bd17 /src/mainboard/asus/p8h61-m_lx3_r2_0/hda_verb.c
parentfb8823ddaa5badd3a7575b48cb8b8aec1016f2a7 (diff)
mb/asus/p8h61-m_lx3_r2_0: Add new mainboard
This is a micro ATX board with a LGA1155 socket and two DDR3 DIMM slots. Porting was done using autoport and then doing a bunch of manual edits. Actually, I have the PLUS variant, but they use the same PCB. The only difference is the capacitor quality. Working: - Both DIMM slots - PS/2 keyboard - S3 suspend/resume - Rear USB ports - Integrated graphics (libgfxinit) - VGA - All PCIe ports - Realtek GbE (coreboot must set the MAC address) - SATA ports - Native raminit - Flashing with flashrom - Rear audio output - VBT - Arch Linux using CorebootPayloadPkg Untested: - PS/2 mouse - The other audio jacks - EHCI debug - Front USB headers - Non-Linux OSes Change-Id: I385ee72673202d896041209ff2911995307cb6af Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/asus/p8h61-m_lx3_r2_0/hda_verb.c')
-rw-r--r--src/mainboard/asus/p8h61-m_lx3_r2_0/hda_verb.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/src/mainboard/asus/p8h61-m_lx3_r2_0/hda_verb.c b/src/mainboard/asus/p8h61-m_lx3_r2_0/hda_verb.c
new file mode 100644
index 0000000000..cab7aa5da7
--- /dev/null
+++ b/src/mainboard/asus/p8h61-m_lx3_r2_0/hda_verb.c
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+ 0x11060397, /* Codec Vendor / Device ID: VIA VT1708S */
+ 0x10438415, /* Subsystem ID */
+ 12, /* Number of 4 dword sets */
+ AZALIA_SUBVENDOR(0, 0x10438415),
+ AZALIA_PIN_CFG(0, 0x19, 0x410110f0),
+ AZALIA_PIN_CFG(0, 0x1a, 0x01a19036),
+ AZALIA_PIN_CFG(0, 0x1b, 0x0181303e),
+ AZALIA_PIN_CFG(0, 0x1c, 0x01014010),
+ AZALIA_PIN_CFG(0, 0x1d, 0x0221401f),
+ AZALIA_PIN_CFG(0, 0x1e, 0x02a19037),
+ AZALIA_PIN_CFG(0, 0x1f, 0x503701f0),
+ AZALIA_PIN_CFG(0, 0x20, 0x585600f0),
+ AZALIA_PIN_CFG(0, 0x21, 0x474411f0),
+ AZALIA_PIN_CFG(0, 0x22, 0x410160f0),
+ AZALIA_PIN_CFG(0, 0x23, 0x410120f0),
+};
+
+const u32 pc_beep_verbs[0] = {};
+
+AZALIA_ARRAY_SIZES;