mb/asus/p8h61-m_lx3_r2_0: Add new mainboard

This is a micro ATX board with a LGA1155 socket and two DDR3 DIMM slots.
Porting was done using autoport and then doing a bunch of manual edits.
Actually, I have the PLUS variant, but they use the same PCB. The only
difference is the capacitor quality.

Working:
 - Both DIMM slots
 - PS/2 keyboard
 - S3 suspend/resume
 - Rear USB ports
 - Integrated graphics (libgfxinit)
 - VGA
 - All PCIe ports
 - Realtek GbE (coreboot must set the MAC address)
 - SATA ports
 - Native raminit
 - Flashing with flashrom
 - Rear audio output
 - VBT
 - Arch Linux using CorebootPayloadPkg

Untested:
 - PS/2 mouse
 - The other audio jacks
 - EHCI debug
 - Front USB headers
 - Non-Linux OSes

Change-Id: I385ee72673202d896041209ff2911995307cb6af
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39099
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

1 files changed, 26 insertions, 0 deletions

diff --git a/src/mainboard/asus/p8h61-m_lx3_r2_0/dsdt.asl b/src/mainboard/asus/p8h61-m_lx3_r2_0/dsdt.asl
new file mode 100644
index 0000000000..af0cbad1d1
--- /dev/null
+++ b/src/mainboard/asus/p8h61-m_lx3_r2_0/dsdt.asl
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
+
+#include <arch/acpi.h>
+
+DefinitionBlock(
+	"dsdt.aml",
+	"DSDT",
+	0x02,		/* DSDT revision: ACPI 2.0 and up */
+	OEM_ID,
+	ACPI_TABLE_CREATOR,
+	0x20141018	/* OEM revision */
+)
+{
+	#include "acpi/platform.asl"
+	#include <cpu/intel/common/acpi/cpu.asl>
+	#include <southbridge/intel/common/acpi/platform.asl>
+	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
+
+	Device (\_SB.PCI0)
+	{
+		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
+		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+	}
+}