aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/asus/p5qpl-am/dsdt.asl
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2018-12-16 17:17:13 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-24 08:18:16 +0000
commit3534c1e42de7e534902c3c5bdce30eadb251d081 (patch)
tree75fc6eef7807112b1999b576a0e8694f1eed88a9 /src/mainboard/asus/p5qpl-am/dsdt.asl
parentba5e70e967ea72e46b91c4fdcb59a1439bf45f8a (diff)
mb/asus/p5qpl-am: Add mainboard
This mainboard has the BSEL straps hooked up to the SuperIO similar to the ASUS P5GC-MX and might therefore require a restart. Tested: - FSB 800, 1067 and 1333MHz CPUs - USB - Ethernet - Serial - 2 DIMM slots - SATA - Libgfxinit (VGA) TESTED with SeaBIOS (sercon disabled) and Linux 4.19. Change-Id: Id845289081751ff8900e366592745f16d96f07c0 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30250 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/asus/p5qpl-am/dsdt.asl')
-rw-r--r--src/mainboard/asus/p5qpl-am/dsdt.asl44
1 files changed, 44 insertions, 0 deletions
diff --git a/src/mainboard/asus/p5qpl-am/dsdt.asl b/src/mainboard/asus/p5qpl-am/dsdt.asl
new file mode 100644
index 0000000000..4eade3dfbb
--- /dev/null
+++ b/src/mainboard/asus/p5qpl-am/dsdt.asl
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <southbridge/intel/i82801gx/i82801gx.h>
+
+#include <arch/acpi.h>
+DefinitionBlock(
+ "dsdt.aml",
+ "DSDT",
+ 0x02, // DSDT revision: ACPI v2.0 and up
+ OEM_ID,
+ ACPI_TABLE_CREATOR,
+ 0x20090419 // OEM revision
+)
+{
+ // global NVS and variables
+ #include "acpi/platform.asl"
+ #include <southbridge/intel/i82801gx/acpi/globalnvs.asl>
+
+ Scope (\_SB) {
+ Device (PCI0)
+ {
+ #include <northbridge/intel/x4x/acpi/x4x.asl>
+ #include <southbridge/intel/i82801gx/acpi/ich7.asl>
+ #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
+ }
+ }
+
+ /* Chipset specific sleep states */
+ #include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+}