diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2019-02-05 13:30:11 +0100 |
---|---|---|
committer | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-09 05:37:09 +0000 |
commit | 7e4bfe4b91cc8dbc18a4b940c26f372e471d49db (patch) | |
tree | 8aa6245999e024b4c8871bf4819655a549329d2e /src/mainboard/asus/p5ql-em/cmos.layout | |
parent | b8df689a6aaaa721103ed75d647decad2b4a9528 (diff) |
mb/asus/p5ql-em: Add mainboard
Tested, working:
- First dimm slot of each channel
- USB, SATA
- CPU FSB at 800, 1067 and 1333MHz
- Libgfxinit on DVI and VGA slot
- PCI slot
- Realtek NIC (configure MAC address in Kconfig)
- PEG slot
- PS2 keyboard
Tested, not working:
- second dimm slot for each channel. Those are hooked up to the second
rank of the channel, instead of rank 3 and 4. The raminit does not
support such setups.
Untested:
- PCIe x1 slot, likely works fine
- HDMI
Tested using SeaBIOS 1.12, Linux 4.19.
Change-Id: I88fe9c66dae079cd7eedcc9736c5922defbc0e5a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31323
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/asus/p5ql-em/cmos.layout')
-rw-r--r-- | src/mainboard/asus/p5ql-em/cmos.layout | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/src/mainboard/asus/p5ql-em/cmos.layout b/src/mainboard/asus/p5ql-em/cmos.layout new file mode 100644 index 0000000000..9c707ad18e --- /dev/null +++ b/src/mainboard/asus/p5ql-em/cmos.layout @@ -0,0 +1,80 @@ +## +## This file is part of the coreboot project. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +# ----------------------------------------------------------------- +entries + +# ----------------------------------------------------------------- +0 120 r 0 reserved_memory +#120 264 r 0 unused + +# ----------------------------------------------------------------- +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 4 boot_option +388 4 h 0 reboot_counter +#390 5 r 0 unused + +# ----------------------------------------------------------------- +# coreboot config options: console +395 4 e 6 debug_level + +# coreboot config options: southbridge +#408 1 e 0 unused +409 2 e 7 power_on_after_fail +411 1 e 1 nmi + +# coreboot config options: cpu +#424 8 r 0 unused + +# coreboot config options: northbridge +432 4 e 11 gfx_uma_size +#436 548 r 0 unused + +# coreboot config options: check sums +984 16 h 0 check_sum + +# ----------------------------------------------------------------- + +enumerations + +#ID value text +1 0 Disable +1 1 Enable +2 0 Enable +2 1 Disable +4 0 Fallback +4 1 Normal +6 0 Emergency +6 1 Alert +6 2 Critical +6 3 Error +6 4 Warning +6 5 Notice +6 6 Info +6 7 Debug +6 8 Spew +7 0 Disable +7 1 Enable +7 2 Keep +11 6 64M +11 7 128M +11 8 256M +11 9 96M +11 10 160M +11 11 224M +11 12 352M + +# ----------------------------------------------------------------- +checksums + +checksum 392 983 984 |