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author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-12-13 17:32:53 -0700 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2019-12-27 17:15:19 +0000 |
commit | 5b9062f3f64b15008aeef5753b477256634933da (patch) | |
tree | 1364fc6f7b47c3c1daea84e297a5dbb16f9c5a2f /src/mainboard/asus/p5qc | |
parent | 92bc83674bd5740768c719be2e9402daf9ef27a7 (diff) |
soc/amd/common: Correct SPI FIFO size check
When checking that command and data fit in the FIFO, don't count the first
byte. The command doesn't go through the FIFO.
TEST=confirm error (4+68>71) goes away on Mandolin
BUG=b:146225550
Change-Id: Ica2ca514deea401c9c5396913087e07a12ab3cf3
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37721
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Eric Peers <epeers@google.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/asus/p5qc')
0 files changed, 0 insertions, 0 deletions