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authorArthur Heymans <arthur@aheymans.xyz>2016-11-21 17:11:48 +0100
committerMartin Roth <martinroth@google.com>2016-12-22 16:37:34 +0100
commit6390e525fcbad63fbf4c0043ae248b24b9a9d0c6 (patch)
tree428d28e9d5cccf331776b24ce34c0749586d64cd /src/mainboard/asus/p5gc-mx/acpi
parentf5d9d1454a9e607e59c6b2e1533f70c1ffb565ad (diff)
mb/asus/p5gc-mx: Add mainboard
Tested to work: * GPU (Nvidia gt210) in PCIe x16 slot; * SATA; * serial; * 800MHz and 1067MHz FSB Core 2 Duo CPUs; * ethernet; * native VGA graphic init. What does not work: * resume from s3 suspend; * superio hardware monitor (not initialised in coreboot). Quirks: * does not boot with just one dimm in slot B. Change-Id: Ide5494be7f2f16d6b5cfd2ccf4ec438f0587add5 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17558 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/asus/p5gc-mx/acpi')
-rw-r--r--src/mainboard/asus/p5gc-mx/acpi/ec.asl1
-rw-r--r--src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl75
-rw-r--r--src/mainboard/asus/p5gc-mx/acpi/ich7_pci_irqs.asl47
-rw-r--r--src/mainboard/asus/p5gc-mx/acpi/mainboard.asl30
-rw-r--r--src/mainboard/asus/p5gc-mx/acpi/superio.asl1
-rw-r--r--src/mainboard/asus/p5gc-mx/acpi/thermal.asl1
6 files changed, 155 insertions, 0 deletions
diff --git a/src/mainboard/asus/p5gc-mx/acpi/ec.asl b/src/mainboard/asus/p5gc-mx/acpi/ec.asl
new file mode 100644
index 0000000000..4107d3b60e
--- /dev/null
+++ b/src/mainboard/asus/p5gc-mx/acpi/ec.asl
@@ -0,0 +1 @@
+/* dummy */ \ No newline at end of file
diff --git a/src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl b/src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl
new file mode 100644
index 0000000000..4aaa33fe74
--- /dev/null
+++ b/src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl
@@ -0,0 +1,75 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* This is board specific information: IRQ routing for the
+ * i945
+ */
+
+
+// PCI Interrupt Routing
+Method(_PRT)
+{
+ If (PICM) {
+ Return (Package() {
+ // PCIe Graphics 0:1.0
+ Package() { 0x0001ffff, 0, 0, 16 },
+ // Onboard graphics (IGD) 0:2.0
+ Package() { 0x0002ffff, 0, 0, 16 },
+ // High Definition Audio 0:1b.0
+ Package() { 0x001bffff, 0, 0, 16 },
+ // PCIe Root Ports 0:1c.x
+ Package() { 0x001cffff, 0, 0, 16 },
+ Package() { 0x001cffff, 1, 0, 17 },
+ Package() { 0x001cffff, 2, 0, 18 },
+ Package() { 0x001cffff, 3, 0, 19 },
+ // USB and EHCI 0:1d.x
+ Package() { 0x001dffff, 0, 0, 16 },
+ Package() { 0x001dffff, 1, 0, 17 },
+ Package() { 0x001dffff, 2, 0, 18 },
+ Package() { 0x001dffff, 3, 0, 19 },
+ // LPC device 0:1f.0
+ Package() { 0x001fffff, 0, 0, 16 },
+ Package() { 0x001fffff, 1, 0, 17 },
+ Package() { 0x001fffff, 2, 0, 18 },
+ Package() { 0x001fffff, 3, 0, 19 },
+
+ })
+
+ } Else {
+ Return (Package() {
+ // PCIe Graphics 0:1.0
+ Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+ // Onboard graphics (IGD) 0:2.0
+ Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+ // High Definition Audio 0:1b.0
+ Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+ // PCIe Root Ports 0:1c.x
+ Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+ Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
+ Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
+ Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
+ // USB and EHCI 0:1d.x
+ Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+ Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
+ Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
+ Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
+ // LPC device 0:1f.0
+ Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+ Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
+ Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
+ Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
+ })
+ }
+}
diff --git a/src/mainboard/asus/p5gc-mx/acpi/ich7_pci_irqs.asl b/src/mainboard/asus/p5gc-mx/acpi/ich7_pci_irqs.asl
new file mode 100644
index 0000000000..408397bad4
--- /dev/null
+++ b/src/mainboard/asus/p5gc-mx/acpi/ich7_pci_irqs.asl
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* This is board specific information: IRQ routing for the
+ * 0:1e.0 PCI bridge of the ICH7
+ */
+
+
+If (PICM) {
+ Return (Package() {
+ Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x11 },
+ Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x12 },
+ Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x13 },
+ Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x10 },
+ Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x15 },
+ Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x16 },
+ Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x17 },
+ Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x14 },
+ Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x14 },
+
+ })
+} Else {
+ Return (Package() {
+ Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LPCB.LNKB, 0x00 },
+ Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LPCB.LNKC, 0x00 },
+ Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LPCB.LNKD, 0x00 },
+ Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LPCB.LNKA, 0x00 },
+ Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LPCB.LNKF, 0x00 },
+ Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LPCB.LNKG, 0x00 },
+ Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LPCB.LNKH, 0x00 },
+ Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LPCB.LNKE, 0x00 },
+ Package (0x04) { 0x0008FFFF, 0x00, \_SB.PCI0.LPCB.LNKE, 0x00 },
+
+ })
+}
diff --git a/src/mainboard/asus/p5gc-mx/acpi/mainboard.asl b/src/mainboard/asus/p5gc-mx/acpi/mainboard.asl
new file mode 100644
index 0000000000..0454c3fe0a
--- /dev/null
+++ b/src/mainboard/asus/p5gc-mx/acpi/mainboard.asl
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+Device (SLPB)
+{
+ Name(_HID, EisaId("PNP0C0E"))
+
+ // Wake
+ Name(_PRW, Package(){0x1d, 0x04})
+}
+
+Device (PWRB)
+{
+ Name(_HID, EisaId("PNP0C0C"))
+
+ // Wake
+ Name(_PRW, Package(){0x1d, 0x04})
+}
diff --git a/src/mainboard/asus/p5gc-mx/acpi/superio.asl b/src/mainboard/asus/p5gc-mx/acpi/superio.asl
new file mode 100644
index 0000000000..4107d3b60e
--- /dev/null
+++ b/src/mainboard/asus/p5gc-mx/acpi/superio.asl
@@ -0,0 +1 @@
+/* dummy */ \ No newline at end of file
diff --git a/src/mainboard/asus/p5gc-mx/acpi/thermal.asl b/src/mainboard/asus/p5gc-mx/acpi/thermal.asl
new file mode 100644
index 0000000000..4107d3b60e
--- /dev/null
+++ b/src/mainboard/asus/p5gc-mx/acpi/thermal.asl
@@ -0,0 +1 @@
+/* dummy */ \ No newline at end of file