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authorElyes HAOUAS <ehaouas@noos.fr>2016-07-30 17:46:17 +0200
committerMartin Roth <martinroth@google.com>2016-08-14 19:06:25 +0200
commit8ab989e31561cea0c6af5d5e242dd2be97bc73b4 (patch)
tree31bc3a2175762b179d2fc093c34f62c18b15b9ee /src/mainboard/asus/p2b
parent589ef9de8faa2db11a7ce2769fc1d9396a82886b (diff)
src/mainboard: Capitalize ROM, RAM, CPU and APIC
Change-Id: Ia1f24d328a065a54975adde067df36c5751bff2d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15987 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/asus/p2b')
-rw-r--r--src/mainboard/asus/p2b/dsdt.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/asus/p2b/dsdt.asl b/src/mainboard/asus/p2b/dsdt.asl
index b97ba40540..00bea29e17 100644
--- a/src/mainboard/asus/p2b/dsdt.asl
+++ b/src/mainboard/asus/p2b/dsdt.asl
@@ -28,7 +28,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1)
* 3: powered on suspend, CPU context lost S1
* Note: Looks like 'CPU context lost' does _not_ mean the
* CPU restarts at the reset vector. Most likely only
- * caches are lost, so both 0x3 and 0x4 map to acpi S1
+ * caches are lost, so both 0x3 and 0x4 map to ACPI S1
* 4: powered on suspend, context maintained S1
* 5: working (clock control) S0
* 6: reserved