diff options
| author | Keith Hui <buurin@gmail.com> | 2020-03-28 21:54:17 -0400 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-04-20 06:41:25 +0000 |
| commit | 4ec683d0776c50af3d93d158235b834f5d65b579 (patch) | |
| tree | fa48287a13cc02d93b10cc50013a802c191c40a2 /src/mainboard/asus/p2b/variants/p2b-ds/overridetree.cb | |
| parent | a48e7111209f7257cf40b317dc4df42e7c13ae24 (diff) | |
mb/asus/p2b*: Switch to overridetree
All variants will use the same lid/thermal-polarity config as a result,
which looks the same for all recently boot-tested variants anyway.
Change-Id: Iaaae4eae41ab0037e72375b255d9d1c3eca8d383
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39905
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus/p2b/variants/p2b-ds/overridetree.cb')
| -rw-r--r-- | src/mainboard/asus/p2b/variants/p2b-ds/overridetree.cb | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/src/mainboard/asus/p2b/variants/p2b-ds/overridetree.cb b/src/mainboard/asus/p2b/variants/p2b-ds/overridetree.cb new file mode 100644 index 0000000000..6eabe5897b --- /dev/null +++ b/src/mainboard/asus/p2b/variants/p2b-ds/overridetree.cb @@ -0,0 +1,31 @@ +chip northbridge/intel/i440bx # Northbridge + device cpu_cluster 0 on # (L)APIC cluster + chip cpu/intel/slot_1 # CPU socket 0 + device lapic 0 on end # Local APIC of CPU 0 + end + chip cpu/intel/slot_1 # CPU socket 1 + device lapic 1 on end # Local APIC of CPU 1 + end + end + device domain 0 on # PCI domain + chip southbridge/intel/i82371eb # Southbridge + device pci 4.0 on # ISA bridge + chip superio/winbond/w83977tf # Super I/O + device pnp 3f0.9 on # GPIO 3 + end + device pnp 3f0.a on # ACPI + end + end + end + device pci 6.0 on end # Onboard SCSI + register "ide0_enable" = "1" + register "ide1_enable" = "1" + register "ide_legacy_enable" = "1" + # Enable UDMA/33 for higher speed if your IDE device(s) support it. + register "ide0_drive0_udma33_enable" = "1" + register "ide0_drive1_udma33_enable" = "1" + register "ide1_drive0_udma33_enable" = "1" + register "ide1_drive1_udma33_enable" = "1" + end + end +end |