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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2007-10-30 23:57:59 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2007-10-30 23:57:59 +0000 |
| commit | 113c2013bb185b2931630b869ec9e1cb985542dc (patch) | |
| tree | f30568e5b267772c1010665ba1caafb08b0595ca /src/mainboard/asus/p2b/Options.lb | |
| parent | 68d8a56cc56ab9805bee85c08f7211ef8455ca4d (diff) | |
Various smaller fixes to make the ASUS P2B match the format
of all the other boards in this patch series.
Add missing PIRQ table to make most devices work.
Enable VGA support. Add flashrom flashing protection code.
Make CPU init actually work (result: massive speed-up).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2913 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/asus/p2b/Options.lb')
| -rw-r--r-- | src/mainboard/asus/p2b/Options.lb | 26 |
1 files changed, 18 insertions, 8 deletions
diff --git a/src/mainboard/asus/p2b/Options.lb b/src/mainboard/asus/p2b/Options.lb index 7c3a4fd6f2..ebec984879 100644 --- a/src/mainboard/asus/p2b/Options.lb +++ b/src/mainboard/asus/p2b/Options.lb @@ -59,18 +59,27 @@ uses TTYS0_BAUD uses TTYS0_BASE uses TTYS0_LCS uses CONFIG_UDELAY_TSC +uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 +uses MAINBOARD_VENDOR +uses MAINBOARD_PART_NUMBER +uses CONFIG_CONSOLE_VGA +uses CONFIG_PCI_ROM_RUN default ROM_SIZE = 256 * 1024 default HAVE_FALLBACK_BOOT = 1 default HAVE_MP_TABLE = 0 default HAVE_HARD_RESET = 0 -default HAVE_PIRQ_TABLE = 0 -default IRQ_SLOT_COUNT = 4 +default CONFIG_UDELAY_TSC = 1 +default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 +default HAVE_PIRQ_TABLE = 1 +default IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. +default MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. +default MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. +default ROM_IMAGE_SIZE = 64 * 1024 +default FALLBACK_SIZE = 128 * 1024 +default STACK_SIZE = 8 * 1024 +default HEAP_SIZE = 16 * 1024 default HAVE_OPTION_TABLE = 0 -default ROM_IMAGE_SIZE = 65536 -default FALLBACK_SIZE = 131072 -default STACK_SIZE = 0x2000 -default HEAP_SIZE = 0x4000 #default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE default USE_OPTION_TABLE = 0 default _RAMBASE = 0x00004000 @@ -81,9 +90,10 @@ default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default TTYS0_BAUD = 115200 default TTYS0_BASE = 0x3f8 -default TTYS0_LCS = 0x3 +default TTYS0_LCS = 0x3 # 8n1 default DEFAULT_CONSOLE_LOGLEVEL = 9 default MAXIMUM_CONSOLE_LOGLEVEL = 9 -default CONFIG_UDELAY_TSC = 1 +default CONFIG_CONSOLE_VGA = 1 +default CONFIG_PCI_ROM_RUN = 1 end |