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authorRudolf Marek <r.marek@assembler.cz>2013-05-27 20:39:18 +0200
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-06-03 17:50:24 +0200
commit1b22827cf0f190f26dcccec5ae5f36eb4972cde4 (patch)
tree07ab60f63ff9aff494ad3f4dc8c0c1569ca1ff98 /src/mainboard/asus/mew-vm
parent01c095ff4c7ab8cf53f608395824f4e01bef1a42 (diff)
Asus F2A85-M: Fix the _CRS PCI0 bus info
On Asus F2A85-M, the Linux kernel complains that the _CRS method does not specify the number of PCI busses. [FIRMWARE BUG]: ACPI: no secondary bus range in _CRS Just put there 256. This should be part of re-factoring of the whole ACPI stuff. The same change was already done for the AMD Brazos (SB800) boards, based on commit »Persimmon DSDT: Add secondary bus range to PCI0« (4733c647) [1]. [1] http://review.coreboot.org/2592 Change-Id: I06f90ec353df9198a20b2165741ea0fe94071266 Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Reviewed-on: http://review.coreboot.org/3320 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin.roth@se-eng.com> Reviewed-by: David Hubbard <david.c.hubbard+coreboot@gmail.com>
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