summaryrefslogtreecommitdiff
path: root/src/mainboard/asus/m4a785t-m
diff options
context:
space:
mode:
authorTobias Diedrich <ranma+coreboot@tdiedrich.de>2015-06-21 18:58:30 +0200
committerPatrick Georgi <pgeorgi@google.com>2015-10-24 00:17:50 +0200
commita4d179af562770d17ab92dc57f7104fd78be75ba (patch)
tree07fdaac05b7a1ed3614022b31534acb73a2c0a25 /src/mainboard/asus/m4a785t-m
parent9bb09526fa0f34d011c323a9bb23e62b8df6b8ff (diff)
amd/acpi: Clean up SMBus references.
Replace the AMD SMBus section with the equivalent SB800 smbus.asl include or remove already commented-out sections. Verified by running the cpp preprocessor over the DSDTs and diffing the results against this patch. The only change is in src/mainboard/siemens/sitemp_g1p1/dsdt.asl, where someone added RADD and SADD to the OpRegion, but those are unused, so removing them is fine. Change-Id: I074c8a1ed1c9a944d4988752bd0fc42c199c766c Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Reviewed-on: http://review.coreboot.org/10618 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/asus/m4a785t-m')
-rw-r--r--src/mainboard/asus/m4a785t-m/dsdt.asl95
1 files changed, 1 insertions, 94 deletions
diff --git a/src/mainboard/asus/m4a785t-m/dsdt.asl b/src/mainboard/asus/m4a785t-m/dsdt.asl
index 7fc078a422..1d8fa097d7 100644
--- a/src/mainboard/asus/m4a785t-m/dsdt.asl
+++ b/src/mainboard/asus/m4a785t-m/dsdt.asl
@@ -1605,100 +1605,7 @@ DefinitionBlock (
}
} /* End Scope SI */
- /* SMBUS Support */
- Mutex (SBX0, 0x00)
- OperationRegion (SMB0, SystemIO, 0xB00, 0x0C)
- Field (SMB0, ByteAcc, NoLock, Preserve) {
- HSTS, 8, /* SMBUS status */
- SSTS, 8, /* SMBUS slave status */
- HCNT, 8, /* SMBUS control */
- HCMD, 8, /* SMBUS host cmd */
- HADD, 8, /* SMBUS address */
- DAT0, 8, /* SMBUS data0 */
- DAT1, 8, /* SMBUS data1 */
- BLKD, 8, /* SMBUS block data */
- SCNT, 8, /* SMBUS slave control */
- SCMD, 8, /* SMBUS shadow cmd */
- SEVT, 8, /* SMBUS slave event */
- SDAT, 8 /* SMBUS slave data */
- }
-
- Method (WCLR, 0, NotSerialized) { /* clear SMBUS status register */
- Store (0x1E, HSTS)
- Store (0xFA, Local0)
- While (LAnd (LNotEqual (And (HSTS, 0x1E), Zero), LGreater (Local0, Zero))) {
- Stall (0x64)
- Decrement (Local0)
- }
-
- Return (Local0)
- }
-
- Method (SWTC, 1, NotSerialized) {
- Store (Arg0, Local0)
- Store (0x07, Local2)
- Store (One, Local1)
- While (LEqual (Local1, One)) {
- Store (And (HSTS, 0x1E), Local3)
- If (LNotEqual (Local3, Zero)) { /* read sucess */
- If (LEqual (Local3, 0x02)) {
- Store (Zero, Local2)
- }
-
- Store (Zero, Local1)
- }
- Else {
- If (LLess (Local0, 0x0A)) { /* read failure */
- Store (0x10, Local2)
- Store (Zero, Local1)
- }
- Else {
- Sleep (0x0A) /* 10 ms, try again */
- Subtract (Local0, 0x0A, Local0)
- }
- }
- }
-
- Return (Local2)
- }
-
- Method (SMBR, 3, NotSerialized) {
- Store (0x07, Local0)
- If (LEqual (Acquire (SBX0, 0xFFFF), Zero)) {
- Store (WCLR (), Local0) /* clear SMBUS status register before read data */
- If (LEqual (Local0, Zero)) {
- Release (SBX0)
- Return (0x0)
- }
-
- Store (0x1F, HSTS)
- Store (Or (ShiftLeft (Arg1, One), One), HADD)
- Store (Arg2, HCMD)
- If (LEqual (Arg0, 0x07)) {
- Store (0x48, HCNT) /* read byte */
- }
-
- Store (SWTC (0x03E8), Local1) /* 1000 ms */
- If (LEqual (Local1, Zero)) {
- If (LEqual (Arg0, 0x07)) {
- Store (DAT0, Local0)
- }
- }
- Else {
- Store (Local1, Local0)
- }
-
- Release (SBX0)
- }
-
- /* DBGO("the value of SMBusData0 register ") */
- /* DBGO(Arg2) */
- /* DBGO(" is ") */
- /* DBGO(Local0) */
- /* DBGO("\n") */
-
- Return (Local0)
- }
+ #include <southbridge/amd/cimx/sb800/acpi/smbus.asl>
/* THERMAL */
Scope(\_TZ) {