diff options
| author | Tobias Diedrich <ranma+coreboot@tdiedrich.de> | 2010-11-07 20:08:45 +0000 |
|---|---|---|
| committer | Rudolf Marek <r.marek@assembler.cz> | 2010-11-07 20:08:45 +0000 |
| commit | 4e6305f4abd12bdc0a091d16bc091774f72aa55c (patch) | |
| tree | 464f34fdbfff1360a60c14708de8cc8e9cc10de2 /src/mainboard/asus/m2v/devicetree.cb | |
| parent | 4a6dfebf39c3de9140d3b0923a0043010680535d (diff) | |
Should be part of 6044. I forgot to add the directory :/
This adds the m2v directory and necessary files to src/mainboards/asus and
adjusts the Kconfig.
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6045 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/asus/m2v/devicetree.cb')
| -rw-r--r-- | src/mainboard/asus/m2v/devicetree.cb | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/src/mainboard/asus/m2v/devicetree.cb b/src/mainboard/asus/m2v/devicetree.cb new file mode 100644 index 0000000000..a08defba93 --- /dev/null +++ b/src/mainboard/asus/m2v/devicetree.cb @@ -0,0 +1,74 @@ +chip northbridge/amd/amdk8/root_complex # Root complex + device lapic_cluster 0 on # APIC cluster + chip cpu/amd/socket_AM2 # CPU + device lapic 0 on end # APIC + end + end + device pci_domain 0 on # PCI domain + chip northbridge/amd/amdk8 # mc0 + device pci 18.0 on # Northbridge + # Devices on link 0, link 0 == LDT 0 + chip southbridge/via/vt8237r # Southbridge + register "ide0_enable" = "1" # Enable IDE channel 0 + register "ide1_enable" = "1" # Enable IDE channel 1 + register "ide0_80pin_cable" = "1" # 80pin cable on IDE channel 0 + register "ide1_80pin_cable" = "1" # 80pin cable on IDE channel 1 + register "fn_ctrl_lo" = "0xc0" # Enable SB functions + register "fn_ctrl_hi" = "0x0d" # Enable SB functions + device pci 0.0 on end # HT + device pci f.1 on end # IDE + device pci 11.0 on # LPC + chip drivers/generic/generic # DIMM 0-0-0 + device i2c 50 on end + end + chip drivers/generic/generic # DIMM 0-0-1 + device i2c 51 on end + end + chip drivers/generic/generic # DIMM 0-1-0 + device i2c 52 on end + end + chip drivers/generic/generic # DIMM 0-1-1 + device i2c 53 on end + end + chip superio/ite/it8712f # Super I/O + device pnp 2e.0 on # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.1 on # Com1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.2 off end # Com2 (N/A on this board) + device pnp 2e.3 on # Lpt1 + io 0x60 = 0x378 + irq 0x70 = 7 + drq 0x74 = 3 + end + device pnp 2e.4 on # Environment controller + io 0x60 = 0xd00 + io 0x62 = 0xc00 + irq 0x70 = 0x00 + end + device pnp 2e.5 off end # PS/2 keyboard + device pnp 2e.6 off end # PS/2 mouse + device pnp 2e.7 off end # GPIO config + device pnp 2e.8 off end # Midi port + device pnp 2e.9 off end # Game port + device pnp 2e.a off end # IR + end + end + device pci 12.0 off end # VIA LAN (off, other chip used) + device pci 13.0 on end # br + device pci 13.1 on end # br2, need to have it here to discover it + end + chip southbridge/via/k8t890 # "Southbridge" K8T890 + end + end + device pci 18.1 on end + device pci 18.2 on end + device pci 18.3 on end + end + end +end |