diff options
author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-06-08 19:35:06 -0500 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2015-11-11 18:45:14 +0100 |
commit | 83abd81c8acb3a53dfc125e248d9e5fd58f3e0f7 (patch) | |
tree | ca0652a1421652f4eb8b4af358f66e2fc256e1db /src/mainboard/asus/kgpe-d16/cmos.layout | |
parent | dd4390b6e055ef862084a5fc45b756d6fe09151d (diff) |
cpu/amd: Add CC6 support
This patch adds CC6 power save support to the AMD Family 15h
support code. As CC6 is a complex power saving state that
relies heavily on CPU, northbridge, and southbridge cooperation,
this patch alters significant amounts of code throughout the
tree simultaneously.
Allowing the CPU to enter CC6 allows the second level of turbo
boost to be reached, and also provides significant power savings
when the system is idle due to the complete core shutdown.
Change-Id: I44ce157cda97fb85f3e8f3d7262d4712b5410670
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11979
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/asus/kgpe-d16/cmos.layout')
-rw-r--r-- | src/mainboard/asus/kgpe-d16/cmos.layout | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/asus/kgpe-d16/cmos.layout b/src/mainboard/asus/kgpe-d16/cmos.layout index fb6ea738b4..40799d5c55 100644 --- a/src/mainboard/asus/kgpe-d16/cmos.layout +++ b/src/mainboard/asus/kgpe-d16/cmos.layout @@ -38,8 +38,9 @@ entries 458 4 e 11 hypertransport_speed_limit 462 2 e 12 minimum_memory_voltage 464 1 e 2 compute_unit_siblings -465 1 e 1 cpu_cc6_state -466 1 r 0 allow_spd_nvram_cache_restore +465 1 e 1 cpu_c_states +466 1 e 1 cpu_cc6_state +467 1 r 0 allow_spd_nvram_cache_restore 477 1 e 1 ieee1394_controller 728 256 h 0 user_data 984 16 h 0 check_sum |