diff options
| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-05-10 04:37:56 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-02 23:36:08 +0100 |
| commit | 502d457bf9c43e7b100007ca66fd8d61f49ffa61 (patch) | |
| tree | dd4e8fee20e380d316c8ae14ced60dc1889c7a93 /src/mainboard/asus/kgpe-d16/cmos.layout | |
| parent | 2a83935d9f50e3059e7747338a700c2fceb1731a (diff) | |
mainboard/asus/kgpe-d16: Set DDR3 memory voltage based on SPD data
Change-Id: I21777283ce0fd3c607951204a63ff67dc656c8cc
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11956
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/asus/kgpe-d16/cmos.layout')
| -rw-r--r-- | src/mainboard/asus/kgpe-d16/cmos.layout | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/asus/kgpe-d16/cmos.layout b/src/mainboard/asus/kgpe-d16/cmos.layout index 412051507f..c672e099cd 100644 --- a/src/mainboard/asus/kgpe-d16/cmos.layout +++ b/src/mainboard/asus/kgpe-d16/cmos.layout @@ -37,6 +37,7 @@ entries 456 1 e 1 ECC_memory 457 1 e 1 ECC_redirection 458 4 e 11 hypertransport_speed_limit +462 2 e 12 minimum_memory_voltage 477 1 e 1 ieee1394_controller 728 256 h 0 user_data 984 16 h 0 check_sum @@ -125,6 +126,10 @@ enumerations 11 13 400MHz 11 14 300MHz 11 15 200MHz +12 0 1.5V +12 1 1.35V +12 2 1.25V +12 3 1.15V checksums |