sb/amd/sp5100: Add ehci_async_data_cache CMOS option

SP5100 devices are affected by an erratum that can lock up the
EHCI ports under certain conditions.  Add an optional CMOS
option to enable a workaround at the expense of performance.

Change-Id: I305d23dfa50f10a3dcb5c731e8923305c8956dde
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/14241
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>

0 files changed, 0 insertions, 0 deletions