diff options
| author | Felix Singer <felixsinger@posteo.net> | 2024-01-13 23:58:49 +0100 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2024-01-14 23:26:34 +0000 |
| commit | 614e6defbc613797a991f32fbc36a6b8ce99ea84 (patch) | |
| tree | 4210e1e8cbcc0a3997e2613c89ced054684c1a6d /src/mainboard/asus/h61-series/devicetree.cb | |
| parent | 0b1f4382a53f4af51b5170c5f9d912ff1ca5409b (diff) | |
mb/asus/h61-series: Remove superfluous comments related to PCI devices
Since all devicetrees from asus/h61_series are using the reference names
for PCI devices now, remove the equivalent comments documenting their
function.
Change-Id: I1ba2cb08e60cf806c5d749be15265e577a7abc25
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79970
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Diffstat (limited to 'src/mainboard/asus/h61-series/devicetree.cb')
| -rw-r--r-- | src/mainboard/asus/h61-series/devicetree.cb | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/src/mainboard/asus/h61-series/devicetree.cb b/src/mainboard/asus/h61-series/devicetree.cb index cde04317f0..7f37acc7ca 100644 --- a/src/mainboard/asus/h61-series/devicetree.cb +++ b/src/mainboard/asus/h61-series/devicetree.cb @@ -3,39 +3,39 @@ chip northbridge/intel/sandybridge register "spd_addresses" = "{0x50, 0, 0x52, 0}" device domain 0 on - device ref host_bridge on end # Host bridge - device ref peg10 on end # PEG - device ref igd on end # iGPU + device ref host_bridge on end + device ref peg10 on end + device ref igd on end chip southbridge/intel/bd82x6x register "sata_port_map" = "0x33" register "spi_lvscc" = "0x2005" register "spi_uvscc" = "0x2005" - device ref mei1 on end # MEI #1 - device ref mei2 off end # MEI #2 - device ref me_ide_r off end # ME IDE-R - device ref me_kt off end # ME KT - device ref gbe off end # Intel GbE - device ref ehci2 on end # EHCI #2 - device ref hda on end # HD Audio + device ref mei1 on end + device ref mei2 off end + device ref me_ide_r off end + device ref me_kt off end + device ref gbe off end + device ref ehci2 on end + device ref hda on end - device ref pcie_rp1 off end # RP #1 - device ref pcie_rp2 off end # RP #2 - device ref pcie_rp3 off end # RP #3 - device ref pcie_rp4 off end # RP #4 - device ref pcie_rp5 off end # RP #5 - device ref pcie_rp6 off end # RP #6 - device ref pcie_rp7 off end # RP #7 - device ref pcie_rp8 off end # RP #8 + device ref pcie_rp1 off end + device ref pcie_rp2 off end + device ref pcie_rp3 off end + device ref pcie_rp4 off end + device ref pcie_rp5 off end + device ref pcie_rp6 off end + device ref pcie_rp7 off end + device ref pcie_rp8 off end - device ref ehci1 on end # EHCI #1 - device ref pci_bridge off end # PCI bridge - device ref lpc on end # LPC bridge - device ref sata1 on end # SATA (AHCI) - device ref smbus on end # SMBus - device ref sata2 off end # SATA (Legacy) - device ref thermal off end # Thermal + device ref ehci1 on end + device ref pci_bridge off end + device ref lpc on end + device ref sata1 on end # SATA (AHCI) + device ref smbus on end + device ref sata2 off end # SATA (Legacy) + device ref thermal off end end end end |