mb/*/*: Remove AMD FAMILY15TN boards

These boards use the LEGACY_SMP_INIT which is to be deprecated after
release 4.18.

Change-Id: I9efb5cb1149cc4cf6337c47af8a2f4c4b55f4368
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69111
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

8 files changed, 0 insertions, 475 deletions

diff --git a/src/mainboard/asus/f2a85-m/acpi/cpstate.asl b/src/mainboard/asus/f2a85-m/acpi/cpstate.asl
deleted file mode 100644
index 494fc73201..0000000000
--- a/src/mainboard/asus/f2a85-m/acpi/cpstate.asl
+++ /dev/null
@@ -1,80 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* This file defines the processor and performance state capability
- * for each core in the system.  It is included into the DSDT for each
- * core.  It assumes that each core of the system has the same performance
- * characteristics.
-*/
-	/* P-state support: The maximum number of P-states supported by the */
-	/* CPUs we'll use is 6. */
-	/* Get from AMI BIOS. */
-	Name(_PSS, Package(){
-		Package()
-		{
-			0x00000D48,
-			0x00011170,
-			0x00000004,
-			0x00000004,
-			0x00000000,
-			0x00000000
-		},
-
-		Package()
-		{
-			0x00000AF0,
-			0x0000C544,
-			0x00000004,
-			0x00000004,
-			0x00000001,
-			0x00000001
-		},
-
-		Package()
-		{
-		    0x000009C4,
-		    0x0000B3B0,
-		    0x00000004,
-		    0x00000004,
-		    0x00000002,
-		    0x00000002
-		},
-
-		Package()
-		{
-		    0x00000898,
-		    0x0000ABE0,
-		    0x00000004,
-		    0x00000004,
-		    0x00000003,
-		    0x00000003
-		},
-
-		Package()
-		{
-		    0x00000708,
-		    0x0000A410,
-		    0x00000004,
-		    0x00000004,
-		    0x00000004,
-		    0x00000004
-		},
-
-		Package()
-		{
-		    0x00000578,
-		    0x00006F54,
-		    0x00000004,
-		    0x00000004,
-		    0x00000005,
-		    0x00000005
-		}
-	})
-
-	Name(_PCT, Package(){
-		ResourceTemplate(){Register(FFixedHW, 0, 0, 0)},
-		ResourceTemplate(){Register(FFixedHW, 0, 0, 0)}
-	})
-
-	Method(_PPC, 0){
-		Return(0)
-	}
diff --git a/src/mainboard/asus/f2a85-m/acpi/gpe.asl b/src/mainboard/asus/f2a85-m/acpi/gpe.asl
deleted file mode 100644
index 30d10ce741..0000000000
--- a/src/mainboard/asus/f2a85-m/acpi/gpe.asl
+++ /dev/null
@@ -1,55 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-Scope(\_GPE) {	/* Start Scope GPE */
-
-	/*  General event 3  */
-	Method(_L03) {
-		/* DBGO("\\_GPE\\_L00\n") */
-	}
-
-	/*  Legacy PM event  */
-	Method(_L08) {
-		/* DBGO("\\_GPE\\_L08\n") */
-	}
-
-	/*  Temp warning (TWarn) event  */
-	Method(_L09) {
-		/* DBGO("\\_GPE\\_L09\n") */
-		/* Notify (\_TZ.TZ00, 0x80) */
-	}
-
-	/*  USB controller PME#  */
-	Method(_L0B) {
-		/* DBGO("\\_GPE\\_L0B\n") */
-		Notify(\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
-	}
-
-	/*  ExtEvent0 SCI event  */
-	Method(_L10) {
-		/* DBGO("\\_GPE\\_L10\n") */
-	}
-
-
-	/*  ExtEvent1 SCI event  */
-	Method(_L11) {
-		/* DBGO("\\_GPE\\_L11\n") */
-	}
-
-	/*  GPIO0 or GEvent8 event  */
-	Method(_L18) {
-		/* DBGO("\\_GPE\\_L18\n") */
-		Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
-	}
-
-	/*  Azalia SCI event  */
-	Method(_L1B) {
-		/* DBGO("\\_GPE\\_L1B\n") */
-		Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
-	}
-}	/* End Scope GPE */
diff --git a/src/mainboard/asus/f2a85-m/acpi/routing.asl b/src/mainboard/asus/f2a85-m/acpi/routing.asl
deleted file mode 100644
index dc3f0e8e76..0000000000
--- a/src/mainboard/asus/f2a85-m/acpi/routing.asl
+++ /dev/null
@@ -1,251 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-	/* Routing is in System Bus scope */
-	Name(PR0, Package(){
-		/* NB devices */
-		/* Bus 0, Dev 0 - F15 Host Controller */
-		Package(){0x0000FFFF, 0, INTA, 0 },
-		Package(){0x0000FFFF, 1, INTB, 0 },
-		Package(){0x0000FFFF, 2, INTC, 0 },
-		Package(){0x0000FFFF, 3, INTD, 0 },
-
-		/* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */
-		Package(){0x0001FFFF, 0, INTB, 0 },
-		Package(){0x0001FFFF, 1, INTC, 0 },
-
-		/* Bus 0, Dev 2 - PCIe Bridge for x16 slot */
-		Package(){0x0002FFFF, 0, INTC, 0 },
-		Package(){0x0002FFFF, 1, INTD, 0 },
-		Package(){0x0002FFFF, 2, INTA, 0 },
-		Package(){0x0002FFFF, 3, INTB, 0 },
-
-		/* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
-
-		/* Bus 0, Dev 4 - PCIe Bridge for 4x slot */
-		Package(){0x0004FFFF, 0, INTA, 0 },
-		Package(){0x0004FFFF, 1, INTB, 0 },
-		Package(){0x0004FFFF, 2, INTC, 0 },
-		Package(){0x0004FFFF, 3, INTD, 0 },
-
-		/* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
-		/* Bus 0, Dev 6 - PCIe Bridge for Ethernet Chip */
-		/* Bus 0, Dev 7 - PCIe Bridge for x1 PCIe Slot */
-		/* Bus 0, Dev 8 - Southbridge port (normally hidden) */
-
-#if CONFIG(BOARD_ASUS_F2A85_M_PRO)
-		Package(){0x000FFFFF, 0, INTA, 0 },
-		Package(){0x000FFFFF, 1, INTB, 0 },
-		Package(){0x000FFFFF, 2, INTC, 0 },
-		Package(){0x000FFFFF, 3, INTD, 0 },
-#endif /* CONFIG_BOARD_ASUS_F2A85_M_PRO */
-
-		/* Bus 0, Dev 20 - F0:SMBus/ACPI,F1:IDE;F2:HDAudio;F3:LPC;F4:PCIBridge;F5:USB */
-		Package(){0x0014FFFF, 0, INTA, 0 },
-		Package(){0x0014FFFF, 1, INTB, 0 },
-		Package(){0x0014FFFF, 2, INTC, 0 },
-		Package(){0x0014FFFF, 3, INTD, 0 },
-
-		/* Bus 0, Dev 18,19,22 - USB: OHCI @ func 0
-		 *                            EHCI @ func 2 */
-		Package(){0x0012FFFF, 0, INTC, 0 },
-		Package(){0x0012FFFF, 1, INTB, 0 },
-
-		Package(){0x0013FFFF, 0, INTC, 0 },
-		Package(){0x0013FFFF, 1, INTB, 0 },
-
-		Package(){0x0016FFFF, 0, INTC, 0 },
-		Package(){0x0016FFFF, 1, INTB, 0 },
-
-		/* SB devices */
-		/* Bus 0, Dev 16 - USB: XHCI func 0, 1 */
-		Package(){0x0010FFFF, 0, INTC, 0 },
-		Package(){0x0010FFFF, 1, INTB, 0 },
-
-		/* Bus 0, Dev 17 - SATA controller */
-		Package(){0x0011FFFF, 0, INTD, 0 },
-
-		/* Bus 0, Dev 21 PCIe Bridge */
-		Package(){0x0015FFFF, 0, INTA, 0 },
-		Package(){0x0015FFFF, 1, INTB, 0 },
-		Package(){0x0015FFFF, 2, INTC, 0 },
-		Package(){0x0015FFFF, 3, INTD, 0 },
-	})
-
-	Name(APR0, Package(){
-		/* NB devices in APIC mode */
-		/* Bus 0, Dev 0 - F15 Host Controller */
-		Package(){0x0000FFFF, 0, 0, 16 },
-		Package(){0x0000FFFF, 1, 0, 17 },
-		Package(){0x0000FFFF, 2, 0, 18 },
-		Package(){0x0000FFFF, 3, 0, 19 },
-
-		/* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */
-		Package(){0x0001FFFF, 0, 0, 17 },
-		Package(){0x0001FFFF, 1, 0, 18 },
-
-		/* Bus 0, Dev 2 - PCIe Bridge for x16 PCIe Slot */
-		Package(){0x0002FFFF, 0, 0, 18 },
-		Package(){0x0002FFFF, 1, 0, 19 },
-		Package(){0x0002FFFF, 2, 0, 16 },
-		Package(){0x0002FFFF, 3, 0, 17 },
-
-		/* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
-
-		/* Bus 0, Dev 4 - PCIe Bridge for x4 PCIe Slot black */
-		Package(){0x0004FFFF, 0, 0, 16 },
-		Package(){0x0004FFFF, 1, 0, 17 },
-		Package(){0x0004FFFF, 2, 0, 18 },
-		Package(){0x0004FFFF, 3, 0, 19 },
-
-		/* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
-		/* Bus 0, Dev 6 - General purpose PCIe bridge 6 */
-		/* Bus 0, Dev 7 - PCIe Bridge for network card */
-		/* Bus 0, Dev 8 - Southbridge port (normally hidden) */
-
-		/* Bus 0, Dev 20 - F0:SMBus/ACPI, F1:IDE; F2:HDAudio; F3:LPC; F4:PCIBridge; F5:USB */
-		Package(){0x0014FFFF, 0, 0, 16 },
-		Package(){0x0014FFFF, 1, 0, 17 },
-		Package(){0x0014FFFF, 2, 0, 18 },
-		Package(){0x0014FFFF, 3, 0, 19 },
-
-		/* SB devices in APIC mode */
-		/* Bus 0, Dev 18,19,22 - USB: OHCI @ func 0
-		 *                            EHCI @ func 2 */
-		Package(){0x0012FFFF, 0, 0, 18 },
-		Package(){0x0012FFFF, 1, 0, 17 },
-
-		Package(){0x0013FFFF, 0, 0, 18 },
-		Package(){0x0013FFFF, 1, 0, 17 },
-
-		Package(){0x0016FFFF, 0, 0, 18 },
-		Package(){0x0016FFFF, 1, 0, 17 },
-
-		/* Bus 0, Dev 16 - USB: XHCI func 0, 1 */
-		Package(){0x0010FFFF, 0, 0, 0x12},
-		Package(){0x0010FFFF, 1, 0, 0x11},
-
-		/* Bus 0, Dev 17 - SATA controller */
-		Package(){0x0011FFFF, 0, 0, 19 },
-
-		/* Bus 0, Dev 21 PCIE Bridge */
-		Package(){0x0015FFFF, 0, 0, 17 },
-		Package(){0x0015FFFF, 1, 0, 18 },
-		Package(){0x0015FFFF, 2, 0, 19 },
-		Package(){0x0015FFFF, 3, 0, 16 },
-	})
-
-	Name(PS2, Package(){
-		/* The external GFX - Hooked to PCIe slot 2 */
-		Package(){0x0000FFFF, 0, INTD, 0 },
-		Package(){0x0000FFFF, 1, INTA, 0 },
-		Package(){0x0000FFFF, 2, INTB, 0 },
-		Package(){0x0000FFFF, 3, INTC, 0 },
-	})
-	Name(APS2, Package(){
-		/* The external GFX - Hooked to PCIe slot 2 */
-		Package(){0x0000FFFF, 0, 0, 18 },
-		Package(){0x0000FFFF, 1, 0, 19 },
-		Package(){0x0000FFFF, 2, 0, 16 },
-		Package(){0x0000FFFF, 3, 0, 17 },
-	})
-
-	/* black slot */
-	Name(PS4, Package(){
-		/* PCIe slot - Hooked to PCIe slot 4 */
-		Package(){0x0000FFFF, 0, INTA, 0 },
-		Package(){0x0000FFFF, 1, INTB, 0 },
-		Package(){0x0000FFFF, 2, INTC, 0 },
-		Package(){0x0000FFFF, 3, INTD, 0 },
-	})
-	Name(APS4, Package(){
-		/* PCIe slot - Hooked to PCIe slot 4 */
-		Package(){0x0000FFFF, 0, 0, 16 },
-		Package(){0x0000FFFF, 1, 0, 17 },
-		Package(){0x0000FFFF, 2, 0, 18 },
-		Package(){0x0000FFFF, 3, 0, 19 },
-	})
-
-	Name(PS5, Package(){
-		/* PCIe slot - Hooked to PCIe slot 5 */
-		Package(){0x0000FFFF, 0, INTB, 0 },
-		Package(){0x0000FFFF, 1, INTC, 0 },
-		Package(){0x0000FFFF, 2, INTD, 0 },
-		Package(){0x0000FFFF, 3, INTA, 0 },
-	})
-	Name(APS5, Package(){
-		/* PCIe slot - Hooked to PCIe slot 5 */
-		Package(){0x0000FFFF, 0, 0, 17 },
-		Package(){0x0000FFFF, 1, 0, 18 },
-		Package(){0x0000FFFF, 2, 0, 19 },
-		Package(){0x0000FFFF, 3, 0, 16 },
-	})
-
-	Name(PS6, Package(){
-		/* PCIe slot - Hooked to PCIe slot 6 */
-		Package(){0x0000FFFF, 0, INTC, 0 },
-		Package(){0x0000FFFF, 1, INTD, 0 },
-		Package(){0x0000FFFF, 2, INTA, 0 },
-		Package(){0x0000FFFF, 3, INTB, 0 },
-	})
-	Name(APS6, Package(){
-		/* PCIe slot - Hooked to PCIe slot 6 */
-		Package(){0x0000FFFF, 0, 0, 18 },
-		Package(){0x0000FFFF, 1, 0, 19 },
-		Package(){0x0000FFFF, 2, 0, 16 },
-		Package(){0x0000FFFF, 3, 0, 17 },
-	})
-
-	Name(PS7, Package(){
-		/* The onboard Ethernet chip - Hooked to PCIe slot 7 */
-		Package(){0x0000FFFF, 0, INTD, 0 },
-		Package(){0x0000FFFF, 1, INTA, 0 },
-		Package(){0x0000FFFF, 2, INTB, 0 },
-		Package(){0x0000FFFF, 3, INTC, 0 },
-	})
-
-	Name(APS7, Package(){
-		/* The onboard Ethernet chip - Hooked to PCIe slot 7 */
-		Package(){0x0000FFFF, 0, 0, 19 },
-		Package(){0x0000FFFF, 1, 0, 16 },
-		Package(){0x0000FFFF, 2, 0, 17 },
-		Package(){0x0000FFFF, 3, 0, 18 },
-	})
-
-	Name(PBR0, Package(){
-		/* PCIx1 on SB */
-		Package(){0x0000FFFF, 0, INTA, 0 },
-		Package(){0x0000FFFF, 1, INTB, 0 },
-		Package(){0x0000FFFF, 2, INTC, 0 },
-		Package(){0x0000FFFF, 3, INTD, 0 },
-	})
-	Name(ABR0, Package(){
-		/* PCIx1 on SB */
-		Package(){0x0000FFFF, 0, 0, 0x10 },
-		Package(){0x0000FFFF, 1, 0, 0x11 },
-		Package(){0x0000FFFF, 2, 0, 0x12 },
-		Package(){0x0000FFFF, 3, 0, 0x13 },
-	})
-
-	Name(PBR1, Package(){
-		/* Onboard network */
-		Package(){0x0000FFFF, 0, INTB, 0 },
-		Package(){0x0000FFFF, 1, INTC, 0 },
-		Package(){0x0000FFFF, 2, INTD, 0 },
-		Package(){0x0000FFFF, 3, INTA, 0 },
-	})
-	Name(ABR1, Package(){
-		/* Onboard network */
-		Package(){0x0000FFFF, 0, 0, 0x11 },
-		Package(){0x0000FFFF, 1, 0, 0x12 },
-		Package(){0x0000FFFF, 2, 0, 0x13 },
-		Package(){0x0000FFFF, 3, 0, 0x10 },
-	})
-
-	/* SB PCI Bridge  */
-	Name(PCIB, Package(){
-		/* PCI slots: slot 0 behind Dev14, Fun4. */
-		Package(){0x0005FFFF, 0, 0, 0x14 },
-		Package(){0x0005FFFF, 1, 0, 0x15 },
-		Package(){0x0005FFFF, 2, 0, 0x16 },
-		Package(){0x0005FFFF, 3, 0, 0x17 },
-	})
diff --git a/src/mainboard/asus/f2a85-m/acpi/sata.asl b/src/mainboard/asus/f2a85-m/acpi/sata.asl
deleted file mode 100644
index 16990d45f4..0000000000
--- a/src/mainboard/asus/f2a85-m/acpi/sata.asl
+++ /dev/null
@@ -1,3 +0,0 @@
-/* SPDX-License-Identifier: CC-PDDC */
-
-/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/f2a85-m/acpi/sleep.asl b/src/mainboard/asus/f2a85-m/acpi/sleep.asl
deleted file mode 100644
index 07f6419b64..0000000000
--- a/src/mainboard/asus/f2a85-m/acpi/sleep.asl
+++ /dev/null
@@ -1,67 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* Wake status package */
-Name(WKST,Package(){Zero, Zero})
-
-/*
-* \_PTS - Prepare to Sleep method
-*
-*	Entry:
-*		Arg0=The value of the sleeping state S1=1, S2=2, etc
-*
-* Exit:
-*		-none-
-*
-* The _PTS control method is executed at the beginning of the sleep process
-* for S1-S5. The sleeping value is passed to the _PTS control method.  This
-* control method may be executed a relatively long time before entering the
-* sleep state and the OS may abort the operation without notification to
-* the ACPI driver.  This method cannot modify the configuration or power
-* state of any device in the system.
-*/
-Method(\_PTS, 1) {
-	/* DBGO("\\_PTS\n") */
-	/* DBGO("From S0 to S") */
-	/* DBGO(Arg0) */
-	/* DBGO("\n") */
-
-	/* Clear sleep SMI status flag and enable sleep SMI trap. */
-	/*CSSM = 1
-	SSEN = 1*/
-
-	/* On older chips, clear PciExpWakeDisEn */
-	/*if (\_SB.SBRI <= 0x13) {
-	*	\_SB.PWDE = 0
-	*}
-	*/
-
-	/* Clear wake status structure. */
-	WKST [0] = 0
-	WKST [1] = 0
-
-	UPWS = 0x07
-} /* End Method(\_PTS) */
-
-/*
-*  \_WAK System Wake method
-*
-*	Entry:
-*		Arg0=The value of the sleeping state S1=1, S2=2
-*
-*	Exit:
-*		Return package of 2 DWords
-*		Dword 1 - Status
-*			0x00000000	wake succeeded
-*			0x00000001	Wake was signaled but failed due to lack of power
-*			0x00000002	Wake was signaled but failed due to thermal condition
-*		Dword 2 - Power Supply state
-*			if non-zero the effective S-state the power supply entered
-*/
-Method(\_WAK, 1) {
-	/* DBGO("\\_WAK\n") */
-	/* DBGO("From S") */
-	/* DBGO(Arg0) */
-	/* DBGO(" to S0\n") */
-
-	Return(WKST)
-} /* End Method(\_WAK) */
diff --git a/src/mainboard/asus/f2a85-m/acpi/superio.asl b/src/mainboard/asus/f2a85-m/acpi/superio.asl
deleted file mode 100644
index 16990d45f4..0000000000
--- a/src/mainboard/asus/f2a85-m/acpi/superio.asl
+++ /dev/null
@@ -1,3 +0,0 @@
-/* SPDX-License-Identifier: CC-PDDC */
-
-/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/f2a85-m/acpi/thermal.asl b/src/mainboard/asus/f2a85-m/acpi/thermal.asl
deleted file mode 100644
index 16990d45f4..0000000000
--- a/src/mainboard/asus/f2a85-m/acpi/thermal.asl
+++ /dev/null
@@ -1,3 +0,0 @@
-/* SPDX-License-Identifier: CC-PDDC */
-
-/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/f2a85-m/acpi/usb_oc.asl b/src/mainboard/asus/f2a85-m/acpi/usb_oc.asl
deleted file mode 100644
index a5846fe848..0000000000
--- a/src/mainboard/asus/f2a85-m/acpi/usb_oc.asl
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* USB overcurrent mapping pins.   */
-Name(UOM0, 0)
-Name(UOM1, 2)
-Name(UOM2, 0)
-Name(UOM3, 7)
-Name(UOM4, 2)
-Name(UOM5, 2)
-Name(UOM6, 6)
-Name(UOM7, 2)
-Name(UOM8, 6)
-Name(UOM9, 6)