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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-03-04 07:33:35 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-08-24 10:30:03 +0000
commitffa527002a3eedfb83a97cc597294d767f3ff281 (patch)
tree2220c270e3e2cf0d1358945301dfc9a5f30407a6 /src/mainboard/asus/f2a85-m/OemCustomize.c
parent8176af91e8c9141f889860ab0ac8fbd81c96b015 (diff)
asus/f2a85-m: Switch away from AGESA_LEGACY_WRAPPER
Change-Id: I5a6373ac03d942cd16905c9e8360f7179b8eea61 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/20712 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/asus/f2a85-m/OemCustomize.c')
-rw-r--r--src/mainboard/asus/f2a85-m/OemCustomize.c58
1 files changed, 26 insertions, 32 deletions
diff --git a/src/mainboard/asus/f2a85-m/OemCustomize.c b/src/mainboard/asus/f2a85-m/OemCustomize.c
index fa99d70643..6f4aa82353 100644
--- a/src/mainboard/asus/f2a85-m/OemCustomize.c
+++ b/src/mainboard/asus/f2a85-m/OemCustomize.c
@@ -17,7 +17,7 @@
#include "AGESA.h"
#include "amdlib.h"
-#include <northbridge/amd/agesa/agesawrapper.h>
+#include <northbridge/amd/agesa/state_machine.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
#include <PlatformMemoryConfiguration.h>
@@ -123,6 +123,13 @@ static const PCIe_COMPLEX_DESCRIPTOR Trinity = {
&DdiList[0]
};
+void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset)
+{
+ FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface;
+ FchReset->Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
+ FchReset->Xhci1Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
+}
+
/*---------------------------------------------------------------------------------------*/
/**
* OemCustomizeInitEarly
@@ -139,7 +146,7 @@ static const PCIe_COMPLEX_DESCRIPTOR Trinity = {
**/
/*---------------------------------------------------------------------------------------*/
-static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly)
+void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly)
{
AGESA_STATUS Status;
VOID *TrinityPcieComplexListPtr;
@@ -190,14 +197,6 @@ static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly)
((PCIe_COMPLEX_DESCRIPTOR*)TrinityPcieComplexListPtr)->DdiLinkList = (PCIe_DDI_DESCRIPTOR*)TrinityPcieDdiPtr;
InitEarly->GnbConfig.PcieComplexList = TrinityPcieComplexListPtr;
- return AGESA_SUCCESS;
-}
-
-static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid)
-{
- /* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
- InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
- return AGESA_SUCCESS;
}
/*----------------------------------------------------------------------------------------
@@ -205,14 +204,13 @@ static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid)
*----------------------------------------------------------------------------------------
*/
-#if IS_ENABLED(CONFIG_BOARD_ASUS_F2A85_M) || IS_ENABLED(CONFIG_BOARD_ASUS_F2A85_M_PRO)
/*
* Platform Specific Overriding Table allows IBV/OEM to pass in platform information to AGESA
* (e.g. MemClk routing, the number of DIMM slots per channel,...). If PlatformSpecificTable
* is populated, AGESA will base its settings on the data from the table. Otherwise, it will
* use its default conservative settings.
*/
-CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
+static CONST PSO_ENTRY ROMDATA MemoryTable_M[] = {
NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2),
NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2),
@@ -225,29 +223,25 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
*/
PSO_END
};
-#elif IS_ENABLED(CONFIG_BOARD_ASUS_F2A85_M_LE)
-/*
- * Platform Specific Overriding Table allows IBV/OEM to pass in platform information to AGESA
- * (e.g. MemClk routing, the number of DIMM slots per channel,...). If PlatformSpecificTable
- * is populated, AGESA will base its settings on the data from the table. Otherwise, it will
- * use its default conservative settings.
- */
-CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
+
+static CONST PSO_ENTRY ROMDATA MemoryTable_M_LE[] = {
NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 1),
NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2),
-/*
- TODO: is this OK for DDR3 socket FM2?
- MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
- CKE_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x05, 0x0A),
- ODT_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00),
- CS_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
- */
+
PSO_END
};
-#endif /* CONFIG_BOARD_ASUS_F2A85_M */
-const struct OEM_HOOK OemCustomize = {
- .InitEarly = OemInitEarly,
- .InitMid = OemInitMid,
-};
+void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost)
+{
+ if (IS_ENABLED(CONFIG_BOARD_ASUS_F2A85_M) || IS_ENABLED(CONFIG_BOARD_ASUS_F2A85_M_PRO))
+ InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *) MemoryTable_M;
+ else if (IS_ENABLED(CONFIG_BOARD_ASUS_F2A85_M_LE))
+ InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *) MemoryTable_M_LE;
+}
+
+void board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *InitMid)
+{
+ /* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
+ InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
+}