AGESA binaryPI: Consolidate and fix sleep states

SSFG was meant to be used as a mask to enable sleep states
_S1 thru _S4. However as a logical instead of bitwise 'and'
operation was used, all the states were enabled if only
one was marked available.

State _S3 is now set conditionally if HAVE_ACPI_RESUME=y.
For pi/hudson this had been fixed already preprocessor.

Note that all boards had SSFG == 0x0D that previously
enabled ACPI S3 sleep state even when it was not available.
States _S1 and _S2 still appear enabled in ASL/AML
but may not actually work.

TEST: 'cat /sys/power/state' and notice choice 'mem' was
removed from the list of available sleep states.

Change-Id: I27d616871c1771f0c87d8fba23d4ce1569607765
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21091
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>

4 files changed, 2 insertions, 6 deletions

diff --git a/src/mainboard/asrock/e350m1/acpi/mainboard.asl b/src/mainboard/asrock/e350m1/acpi/mainboard.asl
index b666a4f350..702cb92032 100644
--- a/src/mainboard/asrock/e350m1/acpi/mainboard.asl
+++ b/src/mainboard/asrock/e350m1/acpi/mainboard.asl
@@ -23,8 +23,6 @@ Name(PBLN, 0x0)	/* Length of BIOS area */
 Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)	/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/asrock/e350m1/dsdt.asl b/src/mainboard/asrock/e350m1/dsdt.asl
index 4b48935d03..c70ba80b8a 100644
--- a/src/mainboard/asrock/e350m1/dsdt.asl
+++ b/src/mainboard/asrock/e350m1/dsdt.asl
@@ -49,7 +49,7 @@ DefinitionBlock (
 	#include "acpi/superio.asl"
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"
diff --git a/src/mainboard/asrock/imb-a180/acpi/mainboard.asl b/src/mainboard/asrock/imb-a180/acpi/mainboard.asl
index 0141481d06..68609d868e 100644
--- a/src/mainboard/asrock/imb-a180/acpi/mainboard.asl
+++ b/src/mainboard/asrock/imb-a180/acpi/mainboard.asl
@@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
 Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
 Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
-
 /* Some global data */
 Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name(OSV, Ones)	/* Assume nothing */
diff --git a/src/mainboard/asrock/imb-a180/dsdt.asl b/src/mainboard/asrock/imb-a180/dsdt.asl
index b84f7986e5..e70998921c 100644
--- a/src/mainboard/asrock/imb-a180/dsdt.asl
+++ b/src/mainboard/asrock/imb-a180/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
 	#include <cpu/amd/agesa/family16kb/acpi/cpu.asl>
 
 	/* Contains the supported sleep states for this chipset */
-	#include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl>
+	#include <southbridge/amd/common/acpi/sleepstates.asl>
 
 	/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
 	#include "acpi/sleep.asl"