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authorRaul E Rangel <rrangel@chromium.org>2018-04-11 10:58:14 -0600
committerMartin Roth <martinroth@google.com>2018-04-12 15:21:45 +0000
commit99f54a60bf27dc8f31d79a30f09f94b83856ef00 (patch)
tree9771ccf627da39acd4e7c7bc4c78b2d8c893389e /src/mainboard/asrock
parente96df83583d94ab8cddaa9f8ed8977067336712a (diff)
include/memory_info.h: Change serial number field from 5 bytes to 4
dimm_info.serial had a strange contract. The SPD spec defines a 4 byte serial number. dimm_info.serial required a 4 character ascii string with a null terminator. This change makes the serial field so it matches the SPD spec. smbios.c will then translate the byte array into hex and set it on the smbios table. There were only two callers that set the serial number: * haswell/raminit.c: already does a memcpy(serial, spd->serial, 4), so it already matches the new contract. * amd_late_init.c: Previously copied the last 4 characters. Requires decoding the serial number into a byte array. google/cyan/spd/spd.c: This could be updated to pass the serial number, but it uses a hard coded spd.bin. Testing this on grunt, dmidecode now shows the full serial number: Serial Number: 00000000 BUG=b:65403853 TEST=tested on grunt Change-Id: Ifc58ad9ea4cdd2abe06a170a39b1f32680e7b299 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/25343 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/asrock')
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