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authorAngel Pons <th3fanbus@gmail.com>2021-02-11 13:42:20 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-02-12 19:48:26 +0000
commit33b59c9170a66a7f6d9c26ccf664714ea81d218d (patch)
treef5b71768d08472e1f2f5bea638099601b8e24a37 /src/mainboard/asrock
parent3b0a4899d8ded1ee9bec1d431d91f431291e3eb0 (diff)
haswell: Drop `mainboard_fill_pei_data`
Use global variables to provide mainboard USB settings, and have the northbridge code copy it into the `pei_data` struct. For now. To minimize diffstat noise, this patch does not reindent the now-global mainboard USB configuration arrays. This is cleaned up in a follow-up. Change-Id: I273c7a6cd46734ae25b95fc11b5e188d63cac32e Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50538 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asrock')
-rw-r--r--src/mainboard/asrock/b85m_pro4/romstage.c10
-rw-r--r--src/mainboard/asrock/h81m-hds/romstage.c10
2 files changed, 4 insertions, 16 deletions
diff --git a/src/mainboard/asrock/b85m_pro4/romstage.c b/src/mainboard/asrock/b85m_pro4/romstage.c
index 119d007cf1..16f3d0a8a4 100644
--- a/src/mainboard/asrock/b85m_pro4/romstage.c
+++ b/src/mainboard/asrock/b85m_pro4/romstage.c
@@ -25,9 +25,7 @@ void mb_get_spd_map(uint8_t spd_map[4])
spd_map[3] = 0xa6;
}
-void mainboard_fill_pei_data(struct pei_data *pei_data)
-{
- struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
+ const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
/* Length, Enable, OCn#, Location */
{ 0x0040, 1, 0, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 0, USB_PORT_BACK_PANEL },
@@ -45,7 +43,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{ 0x0040, 1, 6, USB_PORT_BACK_PANEL },
};
- struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = {
+ const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
{ 1, 0 },
{ 1, 0 },
{ 1, 1 },
@@ -53,7 +51,3 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{ 1, 2 },
{ 1, 2 },
};
-
- memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
- memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
-}
diff --git a/src/mainboard/asrock/h81m-hds/romstage.c b/src/mainboard/asrock/h81m-hds/romstage.c
index deb6ec941b..b8ecd43e82 100644
--- a/src/mainboard/asrock/h81m-hds/romstage.c
+++ b/src/mainboard/asrock/h81m-hds/romstage.c
@@ -23,9 +23,7 @@ void mb_get_spd_map(uint8_t spd_map[4])
spd_map[2] = 0xa4;
}
-void mainboard_fill_pei_data(struct pei_data *pei_data)
-{
- struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
+ const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
/* Length, Enable, OCn#, Location */
{ 0x0040, 1, 0, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 0, USB_PORT_BACK_PANEL },
@@ -43,7 +41,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
};
- struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = {
+ const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
/* Enable, OCn# */
{ 1, 0 },
{ 1, 0 },
@@ -52,7 +50,3 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{ 0, USB_OC_PIN_SKIP },
{ 0, USB_OC_PIN_SKIP },
};
-
- memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
- memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
-}