diff options
| author | Tristan Corrick <tristan@corrick.kiwi> | 2018-10-31 03:02:11 +1300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-16 10:05:26 +0000 |
| commit | 3693294112a717aeb3f14db80f9e753dd376ca58 (patch) | |
| tree | 64c25da486e7154a5ecb0d4b6749f7a45932532c /src/mainboard/asrock/h81m-hds/dsdt.asl | |
| parent | b2632cec0e6be1f90e209bbfd54a36287b862a08 (diff) | |
mainboard: Add ASRock H81M-HDS
Tested with GRUB 2.02 as a payload, booting Debian GNU/Linux 9.5 with
kernel 4.9.
This board works quite well under coreboot. A list of what works and
what doesn't can be found in the documentation part of this commit.
The file `data.vbt` matches the VBT in the latest stable version of the
vendor firmware (version 2.20).
Change-Id: I53483bb9fa335e86e85dfc487fef03fce4b85e2a
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/29390
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/mainboard/asrock/h81m-hds/dsdt.asl')
| -rw-r--r-- | src/mainboard/asrock/h81m-hds/dsdt.asl | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/src/mainboard/asrock/h81m-hds/dsdt.asl b/src/mainboard/asrock/h81m-hds/dsdt.asl new file mode 100644 index 0000000000..7ef92532d3 --- /dev/null +++ b/src/mainboard/asrock/h81m-hds/dsdt.asl @@ -0,0 +1,41 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Tristan Corrick <tristan@corrick.kiwi> + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x03, /* DSDT Revision: ACPI v3.0 */ + "COREv4", /* OEM ID */ + "COREBOOT", /* OEM Table ID */ + 0x20181031 /* OEM Revision */ +) +{ + #include "acpi/platform.asl" + #include <southbridge/intel/lynxpoint/acpi/platform.asl> + #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl> + #include <southbridge/intel/lynxpoint/acpi/sleepstates.asl> + #include <cpu/intel/haswell/acpi/cpu.asl> + + Scope (\_SB) + { + Device (PCI0) + { + #include <northbridge/intel/haswell/acpi/haswell.asl> + #include <southbridge/intel/lynxpoint/acpi/pch.asl> + #include <drivers/intel/gma/acpi/default_brightness_levels.asl> + } + } +} |