diff options
| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2019-04-10 10:43:16 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-04-11 11:37:10 +0000 |
| commit | dd11810367e6a66fb9366d108cb0bb6b1664355a (patch) | |
| tree | 4dc06f5e21a8854f0b820b606108d744e5a2dbcd /src/mainboard/asrock/h110m/devicetree.cb | |
| parent | 693709bbec192da51441c2b2b7ab6a821205e16e (diff) | |
mb/asrock/h110m: Add virtual LDN for SuperIO to DT
Adds virtual logical devices numbers for the Nuvoton (NCT6791D)
SuperIO to the devicetree.
Change-Id: I7df1633951c30fef14c62c89aaedebd3044b312f
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32267
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/asrock/h110m/devicetree.cb')
| -rw-r--r-- | src/mainboard/asrock/h110m/devicetree.cb | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index e13076e682..158801f118 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -344,11 +344,18 @@ chip soc/intel/skylake irq 0x72 = 12 # Mouse end device pnp 2e.6 off end # CIR - device pnp 2e.7 off end # GPIO6..8 - # WDT1, WDT_MEM, GPIO 0, GPIO 1 - device pnp 2e.8 off end - # GPIO 2, GPIO 3, GPIO 4, GPIO 5 - device pnp 2e.9 off end + device pnp 2e.7 off end # GPIO6 + device pnp 2e.107 off end # GPIO7 + device pnp 2e.207 off end # GPIO8 + device pnp 2e.8 off end # WDT + device pnp 2e.108 off end # GPIO0 + device pnp 2e.308 off end # GPIO base + device pnp 2e.408 off end # WDTMEM + device pnp 2e.708 off end # GPIO1 + device pnp 2e.9 off end # GPIO2 + device pnp 2e.109 off end # GPIO3 + device pnp 2e.209 off end # GPIO4 + device pnp 2e.309 off end # GPIO5 device pnp 2e.a off end # ACPI device pnp 2e.b on # HWM, LED io 0x60 = 0x0290 @@ -359,7 +366,13 @@ chip soc/intel/skylake device pnp 2e.e off end # CIR wake-up device pnp 2e.f off end # GPIO PP/OD device pnp 2e.14 off end # SVID, Port 80 UART - device pnp 2e.16 off end # Deep sleep + device pnp 2e.16 off end # DS5 + device pnp 2e.116 off end # DS3 + device pnp 2e.316 off end # PCHDSW + device pnp 2e.416 off end # DSWWOPT + device pnp 2e.516 off end # DS3OPT + device pnp 2e.616 off end # DSDSS + device pnp 2e.716 off end # DSPU end # superio/nuvoton/nct6791d chip drivers/pc80/tpm device pnp 4e.0 on end # TPM module |