diff options
| author | Felix Singer <felixsinger@posteo.net> | 2023-10-23 07:26:28 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-10-25 14:16:16 +0000 |
| commit | 21b5a9aff41136bacb3cce78ae027cd588c74295 (patch) | |
| tree | 57ff2a980d3a8704f16c9d7cd80341b107840e82 /src/mainboard/asrock/h110m/devicetree.cb | |
| parent | a41abea65d673d7c006dbde2ca832abdedd0bb2b (diff) | |
devicetrees: Remove trailing backslash from multiline values
It's not needed to put a backslash at the end of a line for quoted
multiline values. Thus, remove it.
Change-Id: I1b83d53598ba2adeed853a96d6c2c1a21f01a9f7
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78576
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/asrock/h110m/devicetree.cb')
| -rw-r--r-- | src/mainboard/asrock/h110m/devicetree.cb | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index 9bffafdb76..f676c5f43e 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -112,11 +112,11 @@ chip soc/intel/skylake # make boards with better PCHs, which can have up to six SATA ports. # However, the H110 PCH only has four SATA ports, which explains why # two connectors are missing. - register "SataPortsEnable" = "{ \ - [0] = 1, \ - [1] = 1, \ - [2] = 1, \ - [3] = 1, \ + register "SataPortsEnable" = "{ + [0] = 1, + [1] = 1, + [2] = 1, + [3] = 1, }" end device pci 19.0 off end # UART #2 |