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authorKyösti Mälkki <kyosti.malkki@gmail.com>2012-06-27 16:14:49 +0300
committerSven Schnelle <svens@stackframe.org>2012-07-02 15:49:07 +0200
commit9ed1456eff73d1a268eabb84176dd2a2107bf2d7 (patch)
tree9811746255b0c2b168f15b76e1375d91280beb28 /src/mainboard/asrock/e350m1
parentac6e3172ff7c1c11da59c488b239d08af1248503 (diff)
Intel CPUs: execute microcode update only once per core
Early HT-enabled CPUs do not serialize microcode updates within a core. Solve this by running microcode updates on the thread with the smallest lapic ID of a core only. Also set MTRRs once per core only. Change-Id: I6a3cc9ecec2d8e0caed29605a9b19ec35a817620 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1142 Tested-by: build bot (Jenkins) Reviewed-by: Sven Schnelle <svens@stackframe.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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