diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-22 10:24:20 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-28 17:25:15 +0200 |
| commit | b426107d1db17b606a90be83ddd3bf8a1c0d8751 (patch) | |
| tree | 0fa5addebf1993a25d8a74fd405bbf59c3def7f8 /src/mainboard/asrock/e350m1/mptable.c | |
| parent | cdfb46240b4bba8a112c85a5f5d26447e90378b3 (diff) | |
AGESA f14 f15tn 16kb: Move IOAPIC ID setup out of get_bus_conf()
Change-Id: I7fd14c17242cd3deb7a784fc918ad6fe1191bd13
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6359
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard/asrock/e350m1/mptable.c')
| -rw-r--r-- | src/mainboard/asrock/e350m1/mptable.c | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/src/mainboard/asrock/e350m1/mptable.c b/src/mainboard/asrock/e350m1/mptable.c index 2c945cfb68..14fa31675f 100644 --- a/src/mainboard/asrock/e350m1/mptable.c +++ b/src/mainboard/asrock/e350m1/mptable.c @@ -19,6 +19,7 @@ #include <arch/io.h> +#include <arch/ioapic.h> #include <arch/smp/mpspec.h> #include <console/console.h> #include <cpu/amd/amdfam14.h> @@ -28,7 +29,6 @@ #include <southbridge/amd/cimx/sb800/SBPLATFORM.h> -extern u32 apicid_sb800; u8 intr_data[] = { [0x00] = 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, /* INTA# - INTH# */ @@ -45,6 +45,14 @@ static void *smp_write_config_table(void *v) struct mp_config_table *mc; int bus_isa; + /* + * By the time this function gets called, the IOAPIC registers + * have been written so they can be read to get the correct + * APIC ID and Version + */ + u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24); + u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); mptable_init(mc, LOCAL_APIC_ADDR); @@ -55,14 +63,10 @@ static void *smp_write_config_table(void *v) mptable_write_buses(mc, NULL, &bus_isa); /* I/O APICs: APIC ID Version State Address */ + smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR); - u32 dword; u8 byte; - ReadPMIO(SB_PMIOA_REG34, AccWidthUint32, &dword); - dword &= 0xFFFFFFF0; - smp_write_ioapic(mc, apicid_sb800, 0x21, dword); - for (byte = 0x0; byte < sizeof(intr_data); byte ++) { outb(byte | 0x80, 0xC00); outb(intr_data[byte], 0xC01); @@ -72,13 +76,13 @@ static void *smp_write_config_table(void *v) #define IO_LOCAL_INT(type, intr, apicid, pin) \ smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin)); - mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0); + mptable_add_isa_interrupts(mc, bus_isa, ioapic_id, 0); /* PCI interrupts are level triggered, and are * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), ioapic_id, (pin)) /* APU Internal Graphic Device*/ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); |