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authorKerry She <shekairui@gmail.com>2011-08-18 18:03:44 +0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2011-09-07 01:08:57 +0200
commitfeed329a0c006968242aa3065506b5f37f4308d4 (patch)
tree0ef0e9e0c112230dd03fe14e199b0be74776b112 /src/mainboard/asrock/e350m1/get_bus_conf.c
parent16d3ec6a58b7a7ba52d4d17299b977e5c3e0557f (diff)
AMD F14 southbridge update
This change adds the southbridge related code to support the update of the AMD Family14 cpus to the rec C0 level. Some of the changes reside in mainboard folders but they reference changed files in the southbridge folder so they are included herein. Change-Id: Ib7786f9f697eaf0bf8abd9140c4dd0c42927ec7e Signed-off-by: Frank Vibrans <frank.vibrans@amd.com> Signed-off-by: efdesign98 <efdesign98@gmail.com> Signed-off-by: Kerry She <kerry.she@amd.com> Signed-off-by: Kerry She <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/135 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/asrock/e350m1/get_bus_conf.c')
-rw-r--r--src/mainboard/asrock/e350m1/get_bus_conf.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/asrock/e350m1/get_bus_conf.c b/src/mainboard/asrock/e350m1/get_bus_conf.c
index cc7fb5d522..43867172d5 100644
--- a/src/mainboard/asrock/e350m1/get_bus_conf.c
+++ b/src/mainboard/asrock/e350m1/get_bus_conf.c
@@ -24,6 +24,9 @@
#include <stdint.h>
#include <stdlib.h>
#include <cpu/amd/amdfam14.h>
+#if CONFIG_AMD_SB_CIMX
+#include "sb_cimx.h"
+#endif
/* Global variables for MB layouts and these will be shared by irqtable mptable
@@ -127,4 +130,8 @@ void get_bus_conf(void)
bus_isa = 10;
apicid_base = CONFIG_MAX_CPUS;
apicid_sb800 = apicid_base;
+
+#if CONFIG_AMD_SB_CIMX
+ sb_Late_Post();
+#endif
}