diff options
| author | Paul Menzel <paulepanter@users.sourceforge.net> | 2017-03-04 10:02:24 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-16 15:21:36 +0100 |
| commit | 824416078e2a9d3d38290e4f2efd1809efbcc747 (patch) | |
| tree | ac92e859f6756a3ba9d77045c12149c847fe36fe /src/mainboard/asrock/e350m1/dsdt.asl | |
| parent | 4dddda294f12c14d5e8310b84d1e9a60149e376a (diff) | |
asrock/e350m1: Include ASL for PS/2 controller
On the ASRock E350M1, with Linux 4.10 after resuming from S3, the PS/2
keyboard does not work. Adding the ASL code, fixes this.
The Linux messages change like below.
Before (equivalent to `i8042.nopnp`):
```
kernel: i8042: PNP: No PS/2 controller found.
kernel: i8042: Probing ports directly.
kernel: serio: i8042 KBD port at 0x60,0x64 irq 1
kernel: serio: i8042 AUX port at 0x60,0x64 irq 12
kernel: mousedev: PS/2 mouse device common for all mice
```
After:
```
kernel: i8042: PNP: PS/2 Controller [PNP0303:PS2K] at 0x60,0x64 irq 1
kernel: i8042: PNP: PS/2 appears to have AUX port disabled, if this is incorrect please boot with i8042.nopnp
kernel: serio: i8042 KBD port at 0x60,0x64 irq 1
kernel: mousedev: PS/2 mouse device common for all mice
```
Change-Id: I0a06311860398cac9cf1a077e3aba75da779f45d
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/18574
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/asrock/e350m1/dsdt.asl')
| -rw-r--r-- | src/mainboard/asrock/e350m1/dsdt.asl | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/asrock/e350m1/dsdt.asl b/src/mainboard/asrock/e350m1/dsdt.asl index 25663714aa..4b48935d03 100644 --- a/src/mainboard/asrock/e350m1/dsdt.asl +++ b/src/mainboard/asrock/e350m1/dsdt.asl @@ -46,6 +46,8 @@ DefinitionBlock ( } } /* End Scope(_SB) */ + #include "acpi/superio.asl" + /* Contains the supported sleep states for this chipset */ #include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl> |