aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/asrock/e350m1/bootblock.c
diff options
context:
space:
mode:
authorDenis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>2019-12-09 00:40:31 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-14 13:42:33 +0000
commit91c47c0deac054d5b949d1bf1be7c0e7cbf7d545 (patch)
tree5fa8a3ed3743d4b90c843c4de3a66a8f53b58168 /src/mainboard/asrock/e350m1/bootblock.c
parentf8e1764bb9696782ad3e525be8be34c3a9e14588 (diff)
asrock/e350m1: Switch away from ROMCC_BOOTBLOCK
Change-Id: Ie14db10b6a72e19ac67254ca8f95bcf6ac8af8d3 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37703 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/asrock/e350m1/bootblock.c')
-rw-r--r--src/mainboard/asrock/e350m1/bootblock.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/src/mainboard/asrock/e350m1/bootblock.c b/src/mainboard/asrock/e350m1/bootblock.c
new file mode 100644
index 0000000000..ea6aac093a
--- /dev/null
+++ b/src/mainboard/asrock/e350m1/bootblock.c
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <superio/nuvoton/common/nuvoton.h>
+#include <superio/nuvoton/nct5572d/nct5572d.h>
+
+#define SERIAL_DEV PNP_DEV(0x2e, NCT5572D_SP1)
+
+void bootblock_mainboard_early_init(void)
+{
+ nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+}