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authorWonkyu Kim <wonkyu.kim@intel.com>2020-04-07 23:34:12 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-04-14 09:52:25 +0000
commite3bf8ba2d812dd027afa8ee8ff368a5295ce1bda (patch)
treef1d5180168c58094c1b362e5a4c2369407c2f394 /src/mainboard/asrock/Kconfig
parent59431176471beac2e074cf0ebca50c98c1ab50c8 (diff)
mb/google/volteer: Enable RP LTR setting
BUG=b:151166040 TEST= build and boot volteer and check LTR and AER value from FSP log Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com> Change-Id: Ibbf55e6a08ff5e8f358325bb8e9f1487cc982f95 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40268 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asrock/Kconfig')
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